S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 758

• Manufacturer Part Number: S9S12G64F0CLFR
• Description: 16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F0CLFR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 40
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

Timer Module (TIM16B8CV3)
The 16-bit main timer is an up counter.
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give a different result than accessing them as a word.
Read: Anytime
Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
23.3.2.6
Read: Anytime
Write: Anytime
760
Module Base + 0x0005
Module Base + 0x0006
Reset
Reset
TSWAI
Field
TEN
7
6
W
W
R
R
TCNT7
TEN
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
If for any reason the timer is not active, there is no ÷64 clock for the pulse accumulator because the ÷64 is
generated by the timer prescaler.
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer module when the MCU is in the wait mode. Timer interrupts cannot be used to get the MCU
TSWAI also affects pulse accumulator.
Timer System Control Register 1 (TSCR1)
0
0
7
7
out of wait.
= Unimplemented or Reserved
TCNT6
TSWAI
Figure 23-12. Timer System Control Register 1 (TSCR1)
0
0
6
6
Figure 23-11. Timer Count Register Low (TCNTL)
MC9S12G Family Reference Manual,
Table 23-6. TSCR1 Field Descriptions
TCNT5
TSFRZ
0
0
5
5
TCNT4
TFFCA
0
0
4
4
Description
TCNT3
PRNT
0
0
3
3
Rev.1.23
TCNT2
0
0
0
2
2
TCNT1
Freescale Semiconductor
0
0
0
1
1
TCNT0
0
0
0
0
0