CD4047BCN_Q Fairchild Semiconductor, CD4047BCN_Q Datasheet

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CD4047BCN_Q

Manufacturer Part Number
CD4047BCN_Q
Description
Monostable Multivibrator Monostable Multivib
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of CD4047BCN_Q

Logic Family
CD40
Logic Type
Monostable Multivibrator
Package / Case
PDIP-14
Mounting Style
Through Hole
© 2002 Fairchild Semiconductor Corporation
CD4047BCM
CD4047BCN
CD4047BC
Low Power Monostable/Astable Multivibrator
General Description
The CD4047B is capable of operating in either the
monostable or astable mode. It requires an external capac-
itor (between pins 1 and 3) and an external resistor
(between pins 2 and 3) to determine the output pulse width
in the monostable mode, and the output frequency in the
astable mode.
Astable operation is enabled by a high level on the astable
input or low level on the astable input. The output fre-
quency (at 50% duty cycle) at Q and Q outputs is deter-
mined by the timing components. A frequency twice that of
Q is available at the Oscillator Output; a 50% duty cycle is
not guaranteed.
Monostable operation is obtained when the device is trig-
gered by LOW-to-HIGH transition at
HIGH-to-LOW transition at
be retriggered by applying a simultaneous LOW-to-HIGH
transition to both the
A high level on Reset input resets the outputs Q to LOW, Q
to HIGH.
Features
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
Wide supply voltage range:
High noise immunity: 0.45 V
Low power TTL compatibility: Fan out of 2 driving 74L
or 1 driving 74LS
Special Features
Low power consumption: special CMOS oscillator
configuration
Monostable (one-shot) or astable (free-running)
operation
True and complemented buffered outputs
Only one external R and C required
Package Number
trigger and retrigger inputs.
M14A
N14A
trigger input. The device can
DD
3.0V to 15V
(typ.)
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
trigger input or
DS005969
Applications
• Frequency discriminators
• Timing circuits
• Time-delay applications
• Envelope detection
• Frequency multiplication
• Frequency division
Monostable Multivibrator
Features
Positive- or negative-edge trigger
Output pulse width independent of trigger pulse duration
Retriggerable option for pulse width expansion
Long pulse widths possible using small RC components
by means of external counter provision
Fast recovery time essentially independent of pulse
width
Pulse-width
approaching 100%
Astable Multivibrator Features
Free-running or gatable operating modes
50% duty cycle
Oscillator output available
Good astable frequency stability
typical
frequency
deviation (circuits trimmed to frequency V
10%)
Package Description
2%
0.5%
accuracy
0.03%/ C @ 100 kHz
0.015%/ C @ 10 kHz
maintained
October 1987
Revised March 2002
www.fairchildsemi.com
at
duty
DD
cycles
10V

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CD4047BCN_Q Summary of contents

Page 1

... CD4047BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2002 Fairchild Semiconductor Corporation Monostable Multivibrator Features Positive- or negative-edge trigger Output pulse width independent of trigger pulse duration ...

Page 2

Connection Diagram Function Table To V Function Astable Multivibrator Free-Running True Gating Complement Gating 6, 14 Monostable Multivibrator Positive-Edge Trigger 4, 14 Negative-Edge Trigger Retriggerable 4, 14 External Countdown (Note ...

Page 3

Block Diagram Logic Diagram *Special input protection circuit to permit larger input-voltage swings. 3 www.fairchildsemi.com ...

Page 4

Absolute Maximum Ratings (Note 3) DC Supply Voltage ( Input Voltage ( Storage Temperature Range ( Power Dissipation ( Dual-In-Line Small Outline Lead Temperature ( (Soldering, 10 ...

Page 5

AC Electrical Characteristics pF, R 200k, input Symbol Parameter Propagation Delay Time Astable, PHL PLH Astable to Osc Out Astable, Astable ...

Page 6

Typical Performance Characteristics Typical Q, Q, Osc Out Period Accuracy vs Supply Voltage (Astable Mode Operation 1000 kHz 22k B 100 kHz 22k C 10 kHz 220k D 1 kHz 220k E 100 Hz ...

Page 7

Typical Performance Characteristics Timing Diagrams Astable Mode (Continued) Monostable Mode Retrigger Mode 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow www.fairchildsemi.com Package Number M14A 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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