NC7WZ08K8X_Q Fairchild Semiconductor, NC7WZ08K8X_Q Datasheet - Page 8

• Manufacturer Part Number: NC7WZ08K8X_Q
• Description: Logic Gates UHS 2-Input AND Gate
• Manufacturer: Fairchild Semiconductor

Specifications of NC7WZ08K8X_Q

• Product Category: Logic Gates
• Product: AND
• Logic Family: NC7WZ
• Number Of Gates: 2
• Number Of Lines (input / Output): 2 / 1
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 4.8 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: US8
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 2
• Number Of Output Lines: 1

©2000 Fairchild Semiconductor Corporation
NC7WZ08 Rev. 1.11.0
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
PIN #1 IDENT.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982.
0.90 MAX
A. CONFORMS TO JEDEC REGISTRATION MO-187
MAB08AREVC
AND TIE BAR EXTRUSIONS.
-C-
3.1±.1
0.50TYP
0.15
1.55
ALL LEAD TIPS
1
8
0.1 C
Figure 4. 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
4
5
0.17-0.27
2.3±0.1
ALL LEAD TIPS
0.13
0.10
0.00
0.2 C B A
-B-
0.70±0.10
A B
C
8
0.4 TYP
1.00
0°-8°
0.5 TYP
0.70
DETAIL A
DETAIL A
1.80
0.10-0.18
0.30 TYP
SEATING PLANE
GAGE PLANE
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0.12