AT49LH002-33JC Atmel, AT49LH002-33JC Datasheet - Page 4

IC FLASH 2MBIT 33MHZ 32PLCC

AT49LH002-33JC

Manufacturer Part Number
AT49LH002-33JC
Description
IC FLASH 2MBIT 33MHZ 32PLCC
Manufacturer
Atmel
Datasheet

Specifications of AT49LH002-33JC

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
33MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 85°C
Package / Case
32-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Table 1. Signal Descriptions (Continued)
4
Symbol
INIT
TBL
WP
ID[3:0]
GPI[4:0]
A[10:0]
AT49LH002
Name and Function
PROCESSOR RESET/INITIALIZE: The INIT pin is used as a second reset pin for
In-System operation and functions identically to the RST pin. The INIT pin is
designed to be connected to the chipset’s INIT signal.
The maximum voltage to be applied to the INIT pin depends on the processor’s or
chipset’s specifications. Systems must take care to not violate processor or chipset
specifications regarding the INIT pin voltage.
This pin is used as the OE pin in the A/A Mux interface.
TOP BOOT SECTOR LOCK: When the TBL pin is held low, program and erase
operations cannot be performed to the 16-Kbyte top boot sector regardless of the
state of the Sector Locking Registers. In addition, the TBL pin will either protect the
16-Kbyte top boot sector or the uppermost 64-Kbyte region against erasures
depending on which sector erase command has been issued to the device. Please
refer to the Sector Protection section for more details.
If the TBL pin is held high, then hardware write protection for the top boot sector will
be disabled. However, register-based sector protection will still apply. The state of
the TBL pin does not affect the state of the Sector Locking Registers.
This pin is used as the A4 pin in the A/A Mux interface.
WRITE PROTECT: The WP pin is used to protect all remaining sectors that are not
being used for the top boot region. See the “Sector Protection” section on page 16
for more details.
If the WP pin is high, then hardware write protection for all of the sectors except the
top boot sector will be disabled. Register-based sector protection, however, will still
apply. The state of the WP pin does not affect the state of the Sector Locking
Registers.
This pin is used as the A5 pin in the A/A Mux interface.
IDENTIFICATION INPUTS: These four pins are part of the mechanism that allows
multiple devices to be attached to the same bus. The strapping of these pins is
used to assign an ID to each device. The boot device must have ID[3:0] = 0000,
and it is recommended that all subsequent devices should use sequential up-count
strapping (e.g., 0001, 0010, 0011, etc.).
Values presented on the ID[3:0] pins are only recognized when the device is
operated as a FWH device. If the device is operating as an LPC Flash, then the
ID[3:0] pins are ignored.
The ID[3:0] pins are internally pulled-down with resistors valued between 20 kΩ and
100 kΩ when using the FWH/LPC interface, so connection of these pins is not
necessary if only a single device will be used in a system. Any pins intended to be
low may be left floating. Any ID pin driven high will exhibit some leakage current.
These pins are used as the A[3:0] pins in the A/A Mux interface.
GENERAL-PURPOSE INPUTS: The individual GPI pins can be used for additional
board flexibility. The state of the GPI pins can be read, using the FWH/LPC
interface, through the GPI register. The GPI pins should be at their desired state
before the start of the PCI clock cycle during which the read is attempted, and they
should remain at the same level until the end of the read cycle.
The voltages applied to the GPI pins must comply with the devices V
requirements. Any unused GPI pins must not be left floating.
These pins are used as the A[10:6] pins in the A/A Mux interface.
ADDRESS INPUTS: These pins are used for inputting the multiplexed address
values when using the A/A Mux interface. The addresses are latched by the rising
and falling edge of R/C pin.
IH
and V
IL
FWH/LPC
FWH
X
X
X
X
Interface
A/A Mux
X
3377B–FLASH–9/03
Type
Input
Input
Input
Input
Input
Input

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