FSQ510 Fairchild Semiconductor, FSQ510 Datasheet - Page 9

• Manufacturer Part Number: FSQ510
• Description: IC SWITCH FPS 0.5A 700V 7-DIP
• Manufacturer: Fairchild Semiconductor

Specifications of FSQ510

• Output Isolation: Isolated
• Frequency Range: 94.3 ~ 132kHz
• Voltage - Input: 6.7 ~ 20 V
• Voltage - Output: 700V
• Power (watts): 9W
• Operating Temperature: -40°C ~ 130°C
• Package / Case: 8-DIP (0.300", 7.62mm), 7 Leads
• On Resistance (max): 28 Ohms
• Maximum Operating Temperature: + 140 C
• Minimum Operating Temperature: - 40 C
• Maximum Power Dissipation: 1380 mW
• Mounting Style: Through Hole
• Supply Current: 0.8 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2009 Fairchild Semiconductor Corporation
FSQ510, FSQ510H, and FSQ510M • Rev. 1.3.0
Functional Description
1. Startup: At startup, an internal high-voltage current
source supplies the internal bias and charges the
external capacitor (C
illustrated in Figure 13. When V
FPS begins switching and the internal high-voltage
current source is disabled. The FPS continues normal
switching operation and the power is supplied from the
auxiliary transformer winding unless V
stop voltage of 6.7V.
2. Feedback Control: This device employs current-
mode control, as shown in Figure 14. An opto-coupler
(such as the FOD817) and shunt regulator (such as the
KA431) are typically used to implement the feedback
network. Comparing the feedback voltage with the
voltage across the R
control the switching duty cycle. When the reference pin
voltage of the shunt regulator exceeds the internal
reference voltage of 2.5V, the opto-coupler LED current
increases, pulling down the feedback voltage and
reducing the drain current. This typically occurs when the
input voltage is increased or the output load is decreased.
2.1 Pulse-by-Pulse Current Limit: Because current-
mode control is employed, the peak current through the
SenseFET is limited by the inverting input of PWM
comparator (V
that the 225µA current source flows only through the
internal resistor (6R + R=12.6kΩ), the cathode voltage
of diode D2 is about 2.8V. Since D1 is blocked when
the feedback voltage (V
voltage of the cathode of D2 is clamped at this voltage,
clamping V
through the SenseFET is limited.
6.7V/
8.7V
FB
5
*. Therefore, the peak value of the current
Figure 13. Startup Block
V
FB
CC
*), as shown in Figure 14. Assuming
C
sense
a
) connected to the V
a
V
FB
CC
) exceeds 2.8V, the maximum
resistor makes it possible to
good
CC
reaches 8.7V, the
CC
I
CH
goes below the
Internal
Bias
V
ref
8
CC
V
V
pin, as
DC
str
3. Synchronization: The FSQ510 (H or M) employs a
valley-switching technique to minimize the switching
noise and loss. The basic waveforms of the valley
switching converter are shown in Figure 15. To
minimize the MOSFET switching loss, the MOSFET
should be turned on when the drain voltage reaches its
minimum value, as shown in Figure 15. The minimum
drain voltage is indirectly detected by monitoring the
V
V
CC
B
O
9
2.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
usually occurs through the SenseFET, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the R
resistor would lead to incorrect feedback operation in
the current mode VS-PWM control. To counter this
effect, the FPS employs a leading-edge blanking
(LEB) circuit to inhibit the VS-PWM comparator for a
short time (t
B
winding voltage, as shown in Figure 15.
MOSFET
Figure 14. Valley Switching Pulse-Width
V
Gate
Figure 15. Valley Switching Waveforms
V
FOD817
Sync
KA431
DS
ON
LEB
V
fb
OB
V
0.7V
) after the SenseFET is turned on.
DC
Modulation (VS-PWM) Circuit
3
I
delay
V
V
SD
ref
D1
t
F
V
ref
I
V
FB
D2
fb
+
-
200ns Delay
*
0.1V
V
V
RO
RO
6R
R
ON
VS signal
OSC
OLP
driver
Gate
www.fairchildsemi.com
R
sense
SenseFET
sense