IC MOSFET DRVR SYNC BUCK 10-DFN

ISL6596CRZ

Manufacturer Part NumberISL6596CRZ
DescriptionIC MOSFET DRVR SYNC BUCK 10-DFN
ManufacturerIntersil
ISL6596CRZ datasheet
 


Specifications of ISL6596CRZ

ConfigurationHigh and Low Side, SynchronousInput TypePWM
Delay Time19nsCurrent - Peak2A
Number Of Configurations1Number Of Outputs2
High Side Voltage - Max (bootstrap)36VVoltage - Supply4.5 V ~ 5.5 V
Operating Temperature0°C ~ 70°CMounting TypeSurface Mount
Package / Case10-DFNLead Free Status / RoHS StatusLead free / RoHS Compliant
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Data Sheet
Synchronous Rectified MOSFET Driver
The ISL6596 is a high frequency, MOSFET driver optimized
to drive two N-Channel power MOSFETs in a synchronous
buck converter topology. This driver combined with Intersil’s
Multi-Phase Buck PWM controllers forms a complete single-
stage core-voltage regulator solution with high efficiency
performance at high switching frequency for advanced
microprocessors.
The IC is biased by a single low voltage supply (5V),
minimizing driver switching losses in high MOSFET gate
capacitance and high switching frequency applications.
Each driver is capable of driving a 3nF load with less than
10ns rise/fall time. Bootstrapping of the upper gate driver is
implemented via an internal low forward drop diode,
reducing implementation cost, complexity, and allowing the
use of higher performance, cost effective N-Channel
MOSFETs. Adaptive shoot-through protection is integrated
to prevent both MOSFETs from conducting simultaneously.
The ISL6596 features 4A typical sink current for the lower
gate driver, enhancing the lower MOSFET gate hold-down
capability during PHASE node rising edge, preventing power
loss caused by the self turn-on of the lower MOSFET due to
the high dV/dt of the switching node.
The ISL6596 also features an input that recognizes a
high-impedance state, working together with Intersil
multi-phase 3.3V or 5V PWM controllers to prevent negative
transients on the controlled output voltage when operation is
suspended. This feature eliminates the need for the schottky
diode that may be utilized in a power system to protect the
load from negative output voltage damage.
Applications
• Core Voltage Supplies for Intel® and AMD®
Microprocessors
• High Frequency Low Profile High Efficiency DC/DC
Converters
• High Current Low Voltage DC/DC Converters
• Synchronous Rectification for Isolated Power Supplies
Related Literature
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN (MLFP) Packages”
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
1
January 22, 2010
Features
• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
• 0.4Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency
• Fast Output Rise and Fall Time
• Low Tri-State Hold-Off Time (20ns)
• Support 3.3V and 5V PWM Input
• Low Quiescent Supply Current
• Power-On Reset
• Expandable Bottom Copper Pad for Heat Spreading
• Dual Flat No-Lead (DFN) Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free (RoHS Compliant)
Ordering Information
PART
NUMBER
PART
(Note)
MARKING
ISL6596CBZ*
6596 CBZ
ISL6596CRZ*
596Z
ISL6596IBZ*
6596 IBZ
ISL6596IRZ*
96IZ
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005, 2010. All Rights Reserved
Intel® is a registered trademark of Intel Corporation. AMD® is a registered trademark of Advanced Micro Devices, Inc.
ISL6596
FN9240.1
TEMP
RANGE
PKG.
(°C)
PACKAGE
DWG. #
0 to +70 8 Ld SOIC
M8.15
0 to +70 10 Ld 3x3 DFN L10.3x3C
-40 to +85 8 Ld SOIC
M8.15
-40 to +85 10 Ld 3x3 DFN L10.3x3C

ISL6596CRZ Summary of contents

  • Page 1

    ... Pb-Free (RoHS Compliant) Ordering Information PART NUMBER PART (Note) MARKING ISL6596CBZ* 6596 CBZ ISL6596CRZ* 596Z ISL6596IBZ* 6596 IBZ ISL6596IRZ* 96IZ *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ ...

  • Page 2

    Pinout ISL6596 (8 LD SOIC) TOP VIEW UGATE 1 BOOT 2 PWM 3 GND 4 Block Diagram VCC VCTRL PWM VCTRL = CONTROLLER VCC 2 ISL6596 8 PHASE 7 VCTRL 6 VCC 5 LGATE ISL6596 SHOOT- THROUGH 7k PROTECTION CONTROL ...

  • Page 3

    Typical Application - Multi-Phase Converter Using ISL6596 Gate Drivers +3.3V +3.3V FB COMP VCC VSEN PWM1 PWM2 PGOOD PWM CONTROLLER (ISL69XX) ISEN1 VID (OPTIONAL) ISEN2 FS/EN GND R IS REQUIRED FOR SPECIAL POWER SEQUENCING APPLICATIONS UGPH 3 ISL6596 +5V BOOT ...

  • Page 4

    ... SOIC Package (Note DFN Package (Notes -0. (DC) Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp - 0.3V (DC BOOT BOOT Recommended Operating Conditions Ambient Temperature Range .-40°C to +100°C Maximum Operating Junction Temperature +125°C Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± ...

  • Page 5

    Electrical Specifications These specifications apply for “Recommended Operating Conditions” on page 4, unless otherwise noted. (Continued) PARAMETER LGATE Turn-On Propagation Delay Tri-state to UG/LG Rising Propagation Delay OUTPUT (Note 4) Upper Drive Source Resistance Upper Drive Sink Resistance Lower Drive ...

  • Page 6

    Functional Pin Description Note: Pin numbers refer to the SOIC package. Check diagram for corresponding DFN pinout. UGATE (Pin 1) Upper gate drive output. Connect to gate of high-side N-Channel power MOSFET. A gate resistor is never recommended on this ...

  • Page 7

    ... MOSFETs. For optimal performance, no more than 50pF parasitic capacitive load should be present on the PWM line of ISL6596 (assuming an Intersil PWM controller is used). Bootstrap Considerations ] after the LGATE This driver features an internal bootstrap diode. Simply adding an external capacitor across the BOOT and PHASE pins completes the bootstrap circuit ...

  • Page 8

    Power Dissipation Package power dissipation is mainly a function of the switching frequency (F ), the output drive impedance, the SW external gate resistance, and the selected MOSFET’s internal gate resistance and total gate charge. Calculating the power dissipation in ...

  • Page 9

    Application Information MOSFET Selection The parasitic inductances of the PCB and of the power devices’ packaging (both upper and lower MOSFETs) can cause serious ringing, exceeding absolute maximum rating of the devices. The negative ringing at the edges of the ...

  • Page 10

    Package Outline Drawing L10.3x3C 10 LEAD DUAL FLAT PACKAGE (DFN) Rev 2, 09/09 3.00 6 PIN 1 INDEX AREA C B (4X) 0.10 TOP VIEW PACKAGE (10 x 0.60) OUTLINE (10x 0.25) (8x 0.50) 1.64 TYPICAL RECOMMENDED LAND PATTERN 10 ...

  • Page 11

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...