ISL6609ACBZ-T Intersil, ISL6609ACBZ-T Datasheet
ISL6609ACBZ-T
Specifications of ISL6609ACBZ-T
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ISL6609ACBZ-T Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2009. All Rights Reserved. Intel® registered trademark of Intel Corporation. ISL6609, ISL6609A FN9221.2 ...
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... ISL6609CBZ-T* ISL66 09CBZ ISL6609CRZ 609Z ISL6609CRZ-T* 609Z ISL6609IBZ ISL66 09IBZ ISL6609IBZ-T* ISL66 09IBZ ISL6609IRZ 09IZ ISL6609IRZ-T* 09IZ ISL6609ACBZ 6609 ACBZ ISL6609ACBZ-T* 6609 ACBZ ISL6609ACRZ 09AZ ISL6609ACRZ-T* 09AZ ISL6609AIBZ 6609 AIBZ ISL6609AIBZ-T* 6609 AIBZ ISL6609AIRZ 9AIZ ISL6609AIRZ-T* 9AIZ ISL6609AIRZ-TK* 9AIZ *Please refer to TB347 for details on reel specifications. ...
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Block Diagram VCC EN VCC PWM INTEGRATED 3Ω RESISTOR (R 3 ISL6609, ISL6609A ISL6609 and ISL6609A R BOOT SHOOT- 4.25k THROUGH PROTECTION CONTROL LOGIC 4k ) AVAILABLE ONLY IN ISL6609A BOOT BOOT UGATE PHASE VCC LGATE GND FN9221.2 April 27, ...
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Typical Application - Multiphase Converter Using ISL6609 Gate Drivers +5V +5V FB COMP VCC VSEN PWM1 PWM2 PGOOD PWM CONTROL (ISL63XX or ISL65XX) ISEN1 VID (OPTIONAL) ISEN2 FS/EN GND R IS REQUIRED FOR SPECIAL POWER SEQUENCING APPLICATIONS UGPH 4 ISL6609, ...
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... QFN Package (Notes 2, 3 -0. (DC) Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C -0. (<10ns) Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp - 0.3V (DC BOOT BOOT = -40°C to 100°C, unless otherwise noted. Parameters with MIN and/or MAX A SYMBOL ...
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Electrical Specifications These specifications apply for T limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER UGATE Turn-On Propagation Delay LGATE Turn-On Propagation Delay Three-state to UG/LG Rising ...
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... MOSFETs. For optimal performance, no more than 100pF parasitic capacitive load should be present on the PWM line of ISL6609, ISL6609A (assuming an Intersil PWM controller is used). Bootstrap Considerations This driver features an internal bootstrap diode. Simply adding an external capacitor across the BOOT and PHASE pins completes the bootstrap circuit. The ISL6609A’ ...
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PHASE node. Typically, such large negative excursions occur in high current applications 2 that use D -PAK and ...
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VCC BOOT HI1 LO1 G1 UGATE PHASE FIGURE 3. TYPICAL UPPER-GATE DRIVE TURN-ON PATH VCC C GD LGATE R G HI2 LO2 GI2 G2 GND FIGURE 4. TYPICAL LOWER-GATE DRIVE TURN-ON ...
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Therefore, the actual coupling effect should be examined using a very high impedance (10MΩ or greater) probe to ensure a safe design margin. – V ⎛ --------------------------------- - ⎜ dV ⋅ ------ - R C ⎜ dV ⋅ ⋅ dt ...
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Package Outline Drawing L8.3x3 8 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 3/07 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 2. 60 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 11 ISL6609, ISL6609A ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...