FAN4810MX Fairchild Semiconductor, FAN4810MX Datasheet - Page 7

• Manufacturer Part Number: FAN4810MX
• Description: IC PFC CTRLR AVERAGE CURR 16SOIC
• Manufacturer: Fairchild Semiconductor

Specifications of FAN4810MX

• Mode: Average Current
• Current - Startup: 200µA
• Voltage - Supply: 11 V ~ 16.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Switching Frequency: 81 KHz
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency - Switching: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: FAN4810MX_NL; FAN4810MX_NLTR; FAN4810MX_NLTR; FAN4810XTR

PRODUCT SPECIFICATION
Power Factor Correction
Power factor correction makes a nonlinear load look like a
resistive load to the AC line. For a resistor, the current drawn
from the line is in phase with and proportional to the line
voltage, so the power factor is unity (one). A common class
of nonlinear load is the input of most power supplies, which
use a bridge rectifier and capacitive input filter fed from the
line. The peak-charging effect, which occurs on the input
filter capacitor in these supplies, causes brief high-amplitude
pulses of current to flow from the power line, rather than
a sinusoidal current inphase with the line voltage. Such
supplies present a power factor to the line of less than one
(i.e. they cause significant current harmonics of the power
line frequency to appear at their input). If the input current
drawn by such a supply (or any other nonlinear load) can be
made to follow the input voltage in instantaneous amplitude,
it will appear resistive to the AC line and a unity power factor
will be achieved.
To hold the input current draw of a device drawing power
from the AC line in phase with and proportional to the input
voltage, a way must be found to prevent that device from
loading the line except in proportion to the instantaneous
line voltage. The PFC of the FAN4810 uses a boost-mode
DC-DC converter to accomplish this. The input to the
converter is the full wave rectified AC line voltage. No bulk
filtering is applied following the bridge rectifier, so the input
voltage to the boost converter ranges (at twice line
frequency) from zero volts to the peak value of the AC input
and back to zero. By forcing the boost converter to meet two
simultaneous conditions, it is possible to ensure that the
current drawn from the power line is proportional to the
input line voltage. One of these conditions is that the output
voltage of the boost converter must be set higher than the
peak value of the line voltage. A commonly used value is
385VDC, to allow for a high line of 270VAC
condition is that the current drawn from the line at any given
instant must be proportional to the line voltage. Establishing
a suitable voltage control loop for the converter, which in
turn drives a current error amplifier and switching output
driver satisfies the first of these requirements. The second
requirement is met by using the rectified AC line voltage to
modulate the output of the voltage control loop. Such
modulation causes the current error amplifier to command a
power stage current that varies directly with the input
voltage. In order to prevent ripple, which will necessarily
appear at the output of the boost circuit (typically about
10VAC on a 385V DC level), from introducing distortion
back through the voltage error amplifier, the bandwidth of
the voltage loop is deliberately kept low. A final refinement
is to adjust the overall gain of the PFC such to be propor-
tional to 1/V
system as the AC input voltage varies.
Since the boost converter topology in the FAN4810 PFC is
of the current-averaging type, no slope compensation is
required.
REV. 1.0.12 9/24/03
IN
2, which linearizes the transfer function of the
rms
. The other
PFC Circuit Blocks
Gain Modulator
Figure 1 shows a block diagram of the FAN4810. The gain
modulator is the heart of the PFC, as it is this circuit block
which controls the response of the current loop to line
voltage waveform and frequency, rms line voltage, and PFC
output voltage. There are three inputs to the gain modulator.
These are:
1.
2.
3.
The output of the gain modulator is a current signal, in the
form of a full wave rectified sinusoid at twice the line
frequency. This current is applied to the virtual-ground
(negative) input of the current error amplifier. In this way
the gain modulator forms the reference for the current error
loop, and ultimately controls the instantaneous current draw
of the PFC from the power line. The general form for the
output of the gain modulator is:
More exactly, the output current of the gain modulator is
given by:
where K is in units of V
Note that the output current of the gain modulator is limited
to 500µA.
A current representing the instantaneous input voltage
(amplitude and waveshape) to the PFC. The rectified AC
input sine wave is converted to a proportional current
via a resistor and is then fed into the gain modulator at
I
noise, as is required in high power switching power con-
version environments. The gain modulator responds lin-
early to this current.
A voltage proportional to the long-term RMS AC line
voltage, derived from the rectified line voltage after
scaling and filtering. This signal is presented to the gain
modulator at V
inversely proportional to V
low values of V
takes over, to limit power dissipation of the circuit
components under heavy brownout conditions). The
relationship between V
illustrated in the Typical Performance Characteristics.
The output of the voltage error amplifier, VEAO. The
gain modulator responds linearly to variations in this
voltage.
I
I
AC
GAINMOD
GAINMOD
. Sampling current in this way minimizes ground
=
=
RMS
RMS
K
I
AC
. The gain modulator’s output is
-1
V
where special gain contouring
.
RMS
VEAO 0.625V
VEAO
RMS
2
RMS
and gain is called K, and is
–
2
1V
(except at unusually
I
AC
FAN4810
(1)
7