FSQ0165RL Fairchild Semiconductor, FSQ0165RL Datasheet - Page 4

• Manufacturer Part Number: FSQ0165RL
• Description: IC SWITCH FPS LOW EMI HE 8-LSOP
• Manufacturer: Fairchild Semiconductor

Specifications of FSQ0165RL

• Output Isolation: Isolated
• Voltage - Input: 9 V ~ 20 V
• Voltage - Output: 650V
• Power (watts): 15W
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP, 8-LSOP
• Voltage - Supply: 9 V ~ 20 V
• Frequency-max: 95.2kHz
• Number Of Outputs: 1
• Pwm Type: Current Mode
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Duty Cycle: -

FSQ0365, FSQ0265, FSQ0165, FSQ321, FSQ311 Rev. 1.0.5
© 2006 Fairchild Semiconductor Corporation
Pin Configuration
Pin Definitions
Pin #
6,7,8
1
2
3
4
5
Name
Drain
GND
Sync
Vcc
Vstr
Vfb
SenseFET source terminal on primary side and internal control ground.
Positive supply voltage input. Although connected to an auxiliary transformer winding, current
is supplied from pin 5 (Vstr) via an internal switch during startup (see Internal Block Diagram
Section). It is not until V
switch opens and device power is supplied via the auxiliary transformer winding.
The feedback voltage pin is the non-inverting input to the PWM comparator. It has a 0.9mA
current source connected internally while a capacitor and optocoupler are typically connected
externally. There is a time delay while charging external capacitor Cfb from 3V to 6V using an
internal 5μA current source. This time delay prevents false triggering under transient condi-
tions but still allows the protection mechanism to operate under true overload conditions.
This pin is internally connected to the sync-detect comparator for valley switching. Typically the
voltage of the auxiliary winding is used as Sync input voltage and external resistors and capac-
itor are needed to make time delay to match valley point. The threshold of the internal sync
comparator is 0.7V/0.2V.
This pin is connected to the rectified AC line voltage source. At start-up the internal switch sup-
plies internal bias and charges an external storage capacitor placed between the Vcc pin and
ground. Once the Vcc reaches 12V, the internal switch is opened.
The drain pins are designed to connect directly to the primary lead of the transformer and are
capable of switching a maximum of 700V. Minimizing the length of the trace connecting these
pins to the transformer will decrease leakage inductance.
Figure 3. Pin Configuration (Top View)
Sync
GND
Vcc
Vfb
CC
reaches the UVLO upper threshold (12V) that the internal start-up
FSQ0365RN Rev.01
8-LSOP
8-DIP
V
4
Description
Vstr
D
D
D
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