ISL6269CRZ Intersil, ISL6269CRZ Datasheet - Page 6

• Manufacturer Part Number: ISL6269CRZ
• Description: IC CTRLR PWM 1-PHASE GPU 16-QFN
• Manufacturer: Intersil

Specifications of ISL6269CRZ

• Pwm Type: Controller
• Number Of Outputs: 1
• Frequency - Max: 600kHz
• Voltage - Supply: 7 V ~ 25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -10°C ~ 100°C
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Frequency-max: 600kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Duty Cycle: -

Electrical Specifications
Functional Pin Descriptions
VIN (Pin 1)
The VIN pin measures the converter input voltage which is a
required input to the R
the input source for the integrated +5V LDO regulator.
Connect across the drain of the high-side MOSFET to the
GND pin.
VCC (Pin 2)
The VCC pin is the output of the integrated +5V LDO
regulator, which provides the bias voltage for the IC. The
VCC pin delivers regulated +5V whenever the EN pin is
pulled above V
requires at least a 1µF MLCC decouple capacitor to the
GND pin.
FCCM (Pin 3)
The FCCM pin configures the controller to operate in forced-
continuous-conduction-mode (FCCM) or diode-emulation-
mode (DEM). DEM is disabled when the FCCM pin is pulled
above the rising threshold voltage V
DEM is enabled when the FCCM pin is pulled below the
falling threshold voltage V
EN (Pin 4)
The EN pin is the on/off switch of the IC. When the EN pin is
pulled above the rising threshold voltage V
5V LDO ramps and begins regulating. The soft-start
sequence begins after
(POR) rising threshold voltage
is pulled below the falling threshold voltage V
immediately stops and
threshold voltage
COMP (Pin 5)
The COMP pin is the output of the control-loop error
amplifier. Compensation components for the control-loop
connect across the COMP and FB pins.
FCCM Leakage
PROTECTION
ISEN OCP Threshold
ISEN Short-Circuit Threshold
UVP Threshold
OVP Rising Threshold
OVP Falling Threshold
OTP Rising Threshold
OTP Hysteresis
PARAMETER
ENTHR
V VCC_THF
. For best performance the LDO
3
V VCC
V VCC
PWM modulator. The VIN pin is also
FCCMTHF.
, at which time the IC turns off.
is above the power-on reset
decays below the POR falling
6
V VCC_THR
These specifications apply for T
PVCC = 5V, VIN = 15V. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not production tested. (Continued)
FCCMTHR
SYMBOL
T
I
I
FCCMH
FCCML
V
V
T
OTHYS
. When the EN pin
V
I
I
OVR
OTR
OVF
ENTHR
OC
SC
UV
ENTHF
, conversely
, the VCC
FCCM = 0V
FCCM = 5.0V
ISEN sourcing, T
ISEN sourcing
ISEN sourcing
, PWM
A
ISL6269
= -40°C to +100°C, unless otherwise stated. All typical specifications T
TEST CONDITIONS
A
= -10°C to +100°C
FB (Pin 6)
The FB pin is the inverting input of the control-loop error
amplifier. The converter output voltage regulates to 600mV
from the FB pin to the GND pin. Program the desired output
voltage with a resistor network connected across the VO,
FB, and GND pins. Select the resistor values such that FB to
GND is 600mV when the converter output voltage is at the
programmed regulation value.
FSET (Pin 7)
The FSET pin programs the PWM switching frequency.
Program the desired PWM frequency with a resistor and a
capacitor connected across the FSET and GND pins.
VO (Pin 8)
The VO pin measures the converter output voltage and is
used exclusively as an input to the R
Connect at the physical location where the best output
voltage regulation is desired.
ISEN (Pin 9)
The ISEN pin programs the threshold of the OCP
overcurrent fault protection. Program the desired OCP
threshold with a resistor connected across the ISEN and
PHASE pins. The OCP threshold is programmed to detect
the peak current of the output inductor. The peak current is
the sum of the DC and AC components of the inductor
current.
PGND (Pin 10)
The PGND pin conducts the turn-off transient current
through the LG gate driver. The PGND pin must be
connected to complete the pull-down circuit of the LG gate
driver. The PGND pin should be connected to the source of
the low-side MOSFET through a low impedance path,
preferably in parallel with the trace connecting the LG pin to
the gate of the low-side MOSFET. The adaptive shoot-
through protection circuit, measures the low-side MOSFET
gate-source voltage from the LG pin to the PGND pin.
MIN
113
100
19
17
81
-
-
-
-
-
3
PWM modulator.
TYP
103
150
116
0.1
2.0
26
26
50
84
25
MAX
106
119
1.0
33
33
87
-
-
-
-
A
June 25, 2009
= +25°C,
FN9177.3
UNIT
µA
µA
µA
µA
µA
°C
°C
%
%
%