ISL6326CRZ-T Intersil, ISL6326CRZ-T Datasheet

IC CTRLR PWM 4PHASE BUCK 40-QFN

ISL6326CRZ-T

Manufacturer Part Number
ISL6326CRZ-T
Description
IC CTRLR PWM 4PHASE BUCK 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6326CRZ-T

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
275kHz
Duty Cycle
25%
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
40-VFQFN, 40-VFQFPN
Frequency-max
275kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
ISL6326CRZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
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Part Number:
ISL6326CRZ-T
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4-Phase PWM Controller with 8-Bit DAC
Code Capable of Precision DCR
Differential Current Sensing
The ISL6326 controls microprocessor core voltage regulation
by driving up to 4 synchronous-rectified buck channels in
parallel. Multiphase buck converter architecture uses
interleaved timing to multiply channel ripple frequency and
reduce input and output ripple currents. Lower ripple results in
fewer components, lower component cost, reduced power
dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates. The ISL6326 utilizes Intersil’s
proprietary Active Pulse Positioning (APP) and Adaptive
Phase Alignment (APA) modulation scheme to achieve the
extremely fast transient response with fewer output capacitors.
Today’s microprocessors require a tightly regulated output
voltage position versus load current (droop). The ISL6326
senses the output current continuously by utilizing patented
techniques to measure the voltage across the dedicated
current sense resistor or the DCR of the output inductor.
Current sensing provides the needed signals for precision
droop, channel-current balancing, and overcurrent
protection. A programmable integrated temperature
compensation function is implemented to effectively
compensate for the temperature coefficient of the current
sense element. The current limit function provides the
overcurrent protection for the individual phase.
A unity gain, differential amplifier is provided for remote
voltage sensing. Any potential difference between remote
and local grounds can be completely eliminated using the
remote-sense amplifier. Eliminating ground differences
improves regulation and protection accuracy. The threshold-
sensitive enable input is available to accurately coordinate
the start up of the ISL6326 with any other voltage rail.
Dynamic-VID™ technology allows seamless on-the-fly VID
changes. The offset pin allows accurate voltage offset
settings that are independent of VID setting.
®
1
Data Sheet
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Proprietary Active Pulse Positioning and Adaptive Phase
• Precision Multiphase Core Voltage Regulation
• Precision Resistor or DCR Current Sensing
• Microprocessor Voltage Identification Input
• Thermal Monitoring
• Integrated Programmable Temperature Compensation
• Overcurrent Protection and Channel Current Limit
• Overvoltage Protection
• 2-, 3- or 4-Phase Operation
• Adjustable Switching Frequency up to 1MHz Per Phase
• Package Option
Ordering Information
ISL6326CRZ* ISL6326CRZ
ISL6326IRZ*
*Add “-T” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Alignment Modulation Scheme
- Differential Remote Voltage Sensing
- ±0.5% System Accuracy Over Life, Load, Line and
- Adjustable Precision Reference-Voltage Offset
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Differential Current Sense
- Dynamic VID™ Technology
- 8-Bit VID Input with Selectable VR11 Code and
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
- QFN Near Chip Scale Package Footprint; Improves
Pb-Free (RoHS Compliant)
NUMBER
(Note)
PART
Temperature
Extended VR10 Code at 6.25mV Per Bit
Flat No Leads - Product Outline
PCB Efficiency, Thinner in Profile
All other trademarks mentioned are the property of their respective owners.
|
May 5, 2008
Intersil (and design) is a registered trademark of Intersil Americas Inc.
ISL6326IRZ -40 to +85 40 Ld 6x6 QFN L40.6x6
MARKING
Copyright Intersil Americas Inc. 2006-2007. All Rights Reserved
PART
0 to+70 40 Ld 6x6 QFN L40.6x6
TEMP.
(°C)
PACKAGE
(Pb-Free)
ISL6326
FN9262.1
DWG. #
PKG.

Related parts for ISL6326CRZ-T

ISL6326CRZ-T Summary of contents

Page 1

... Ordering Information PART NUMBER PART (Note) MARKING ISL6326CRZ* ISL6326CRZ ISL6326IRZ* ISL6326IRZ - 6x6 QFN L40.6x6 *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach ...

Page 2

Pinout VID6 VID5 VID4 VID3 VID2 VID1 VID0 VRSEL OFS DAC 2 ISL6326 ISL6326 (40 LD QFN) TOP VIEW GND ...

Page 3

ISL6326CR Block Diagram VDIFF RGND - X1 + VSEN SOFT-START + OVP - FAULT LOGIC +175mV SS VRSEL VID7 VID6 VID5 DYNAMIC VID4 VID VID3 D/A VID2 VID1 VID0 DAC OFS OFFSET REF FB COMP IDROOP VR_HOT THERMAL MONITOR VR_FAN ...

Page 4

Typical Application - 4-Phase Buck Converter with External Temperature Compensation THERMISTOR NTC +5V °C COMP VCC FB IDROOP VDIFF VSEN PWM1 RGND ISEN1- EN_VTT VTT ISEN1+ VR_RDY VID7 ISL6326 VID6 VID5 VID4 VID3 PWM2 VID2 ISEN2- VID1 ISEN2+ VID0 VRSEL ...

Page 5

Typical Application - 4-Phase Buck Converter with Integrated Temperature Compensation +5V COMP VCC FB IDROOP VDIFF VSEN RGND ISEN1+ EN_VTT VTT ISEN1- VR_RDY VID7 VID6 VID5 ISL6326 VID4 VID3 VID2 ISEN3- VID1 ISEN3+ VID0 VRSEL ISEN2+ VR_FAN ISEN2- VR_HOT VIN ...

Page 6

... Operating Conditions Supply Voltage, (VCC +5V ±5% Ambient Temperature ISL6326CRZ 0°C to +70°C ISL6326IRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. ...

Page 7

Electrical Specifications Operating Conditions: VCC = 5V, Unless Otherwise Specified. (Continued) PARAMETER VRSEL Input High Level DAC Source Current DAC Sink Current REF Source Current REF Sink Current PIN-ADJUSTABLE OFFSET Voltage at OFS Pin OSCILLATORS Accuracy of Switching Frequency Setting ...

Page 8

Electrical Specifications Operating Conditions: VCC = 5V, Unless Otherwise Specified. (Continued) PARAMETER VR_FAN Low Voltage Leakage Current of VR_HOT VR_HOT Low Voltage VR READY AND PROTECTION MONITORS Leakage Current of VR_RDY VR_RDY Low Voltage Undervoltage Threshold VR_RDY Reset Voltage Overvoltage ...

Page 9

... PWM1, PWM2, PWM3, PWM4 Pulse width modulation outputs. Connect these pins to the PWM input pins of the Intersil driver IC. The number of active channels is determined by the state of PWM3 and PWM4. Tie PWM3 to VCC to configure for 2-phase operation. Tie PWM4 to VCC to configure for 3-phase operation. ISEN1+, ISEN1- ...

Page 10

Therefore, the sense current is proportional to the inductor current, and scaled by the DCR of the inductor and R . ISEN To match the time delay of the internal circuit, a capacitor is needed between each ISEN+ ...

Page 11

... Figure 21 shows the single phase input-capacitor RMS current for comparison. PWM Modulation Scheme The ISL6326 adopts Intersil's proprietary Active Pulse Positioning (APP) modulation scheme to improve transient performance. APP control is a unique dual-edge PWM modulation scheme with both PWM leading and trailing edges being independently moved to give the best response to transient loads ...

Page 12

FS pin and ground. The PWM signals command the MOSFET driver to turn on/off the channel MOSFETs. For 4-channel operation, the channel firing order is 4-3-2-1: PWM3 pulse happens 1 cycle after PWM4, ...

Page 13

... Channel current balance is achieved by comparing the sensed current of each channel to the average current to make an appropriate adjustment to the PWM duty cycle of each channel with Intersil’s patented current-balance method. Channel current balance is essential in achieving the thermal advantage of multiphase operation. With good ...

Page 14

External pull-up resistors can augment the pull-up current sources if case leakage into the driving device is greater than 45µA. TABLE 1. VR10 VID TABLE (WITH 6.25mV EXTENSION) ...

Page 15

TABLE 1. VR10 VID TABLE (WITH 6.25mV EXTENSION) VID4 VID3 VID2 VID1 VID0 VID5 400mV 200mV 100mV 50mV 25mV 12.5mV ...

Page 16

TABLE 2. VR11 VID 8-BIT (Continued) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE ...

Page 17

TABLE 2. VR11 VID 8-BIT (Continued) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE ...

Page 18

Load-Line Regulation Some microprocessor manufacturers require a precisely-controlled output resistance. This dependence of output voltage on load current is often termed “droop” or “load line” regulation. By adding a well controlled output impedance, the output voltage can effectively be level ...

Page 19

... ICs reach their POR level before the ISL6326 becomes enabled. The schematic in Figure 7 demonstrates sequencing the ISL6326 with the ISL66xx 19 ISL6326 family of Intersil MOSFET drivers, which require 12V bias. 3. The voltage on EN_VTT must be higher than 0.875V to enable the controller. This pin is typically connected to the output of VTT VR. ...

Page 20

... This causes the . The d5 Intersil drivers to turn on the lower MOSFETs and pull the output voltage below a level to avoid damaging the load. When the VDIFF voltage falls below the DAC + 75mV, PWM signals enter a high-impedance state. The Intersil drivers respond to the high-impedance input by turning off both upper and lower MOSFETs ...

Page 21

... At the beginning of overcurrent shutdown, the controller places all PWM signals in a high-impedance state within 20ns, commanding the Intersil MOSFET driver ICs to turn off both upper and lower MOSFETs. The system remains in this state a period of 4096 switching cycles. If the controller is still enabled at the end of this wait period, it will attempt a soft-start ...

Page 22

TEMPERATURE TM CC 100 TEMPERATURE (°C) FIGURE 12. THE RATIO OF TM VOLTAGE TO NTC TEMPERATURE WITH RECOMMENDED PARTS TM 0.39*V CC 0.33*V CC ...

Page 23

TCOMP voltage can also be used to compensate for the difference between the recommended TM voltage curve in Figure 13 and that of the actual design. According to the VCC voltage, ISL6326 converts the TCOMP pin voltage to a 4-bit ...

Page 24

... It is assumed that the reader is familiar with many of the basic skills and techniques referenced in the following sections. In addition to this guide, Intersil provides complete reference designs that include schematics, bills of materials, and example board layouts for all common microprocessor applications ...

Page 25

MOSFET across VIN. The power dissipated as a result Finally, the resistive part of the upper MOSFET’s is given in Equation 29 ...

Page 26

COMPENSATING LOAD-LINE REGULATED CONVERTER The load-line regulated converter behaves in a similar manner to a peak-current mode controller because the two poles at the output-filter L-C resonant frequency split with the introduction of current information into the control loop. The ...

Page 27

COMP IDROOP VDIFF FIGURE 17. COMPENSATION CIRCUIT FOR ISL6326 BASED CONVERTER WITHOUT LOAD-LINE REGULATION The first step is to choose the desired bandwidth, f compensated system. Choose ...

Page 28

V V – ⎝ ⎠ IN OUT OUT ( ) ≥ L ESR ----------------------------------------------------------- - P-P MAX Since the capacitors are supplying a decreasing portion of the load ...

Page 29

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 30

Package Outline Drawing L40.6x6 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 10/06 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 30 ...

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