EL7581IREZ Intersil, EL7581IREZ Datasheet
EL7581IREZ
Specifications of EL7581IREZ
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EL7581IREZ Summary of contents
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... EL7581IREZ-T7 7581IREZ 7” HTSSOP (Note) (Pb-Free) EL7581IREZ-T13 7581IREZ 13” HTSSOP (Note) (Pb-Free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Absolute Maximum Ratings (T = 25° Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Electrical Specifications V = 3.3V PARAMETER DESCRIPTION NEGATIVE REGULATED CHARGE PUMP (V Most negative V output depends on the magnitude of the V OFF configuration (doubler or tripler) V Supply Input for Negative Charge Pump DDN IQ1(V ) ...
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Pin Descriptions I = Input Output Supply PIN NUMBER PIN NAME PIN TYPE 1 VSSB FBB 4 VDDB DRVN 9 VDDN 10 FBN 11 VSSP 12 ...
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Typical Performance Curves 1MHz 200 400 600 I (mA) OUT FIGURE 1. EFFICIENCY 15V ...
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Typical Performance Curves 15V 12V -2 50 250 450 650 I (mA) OUT FIGURE 7. LOAD REGULATION 12V DDP ...
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Typical Performance Curves R = 61.9kΩ OSC 970 969 968 967 966 965 964 963 962 3 3.5 4 4.5 V (V) DDB FIGURE 13 5V 13V 100mA ...
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Typical Performance Curves I = 15mA -6V 3.3µF O OFF OFF 20mV/DIV 2µs/DIV FIGURE 19. V RIPPLE OFF C = 0.033µ 2V/DIV I IN 0.5A/DIV 1ms/DIV FIGURE 21. START-UP VOLTAGE AND CURRENT C ...
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Typical Performance Curves C = 0.1µF SS 5V/DIV 10V/DIV 2V/DIV 200ms/DIV FIGURE 25. POWER-DOWN, 100K AND 0.1µF DELAY NETWORK ON ENP 11.3V OUT I = 50mA OUT FIGURE 27. LX WAVEFORM - DISCONTINUOUS MODE ...
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Typical Performance Curves FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Block Diagram FBB MAX_DUTY R OSC REFERENCE R 3 GENERATOR 62kΩ V REF V RAMP ENBN 10 EL7581 (Continued) JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 0.9 ...
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Applications Information The EL7581 is high efficiency multiple output power solution designed specifically for thin-film transistor (TFT) liquid crystal display (LCD) applications. The device contains one high current boost converter and two low power charge pumps (V and V ). ...
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Component Considerations Input Capacitor It is recommended that C is larger than 10µF. IN Theoretically, the input capacitor has ripple current of ∆I Due to high-frequency noise in the circuit, the input current ripple may exceed the theoretical value. Larger ...
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V DDN 5V to 17V 0.1µF R ONP DRVN C CPN V R OFF ONN C OUT2 V SSN 3.3µ FBN REF (1.32V) Positive Charge Pump Design Considerations A single stage charge pump is shown ...
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Two-Stage Positive Charge Pump Circuit V DDP R ONP DRNP R ONN V SSP - + 1.265V The maximum V output voltage for N+1 stage charge pump is ≤ × × × max 2 V ...
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Two-Stage Negative Charge Pump Circuit V DDN R DRVN The maximum V output voltage for N+1 stage charge pump is: OFF ( ) ≥ × × max OFF OUT ...
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Typical Application Circuit R 2 110K OPEN 1 13K V BOOST (12V@ 10µF OPEN 22µF 500mA 10µF 4.7µF GND V OFF (-6V@ 15mA) ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...