L6722TR STMicroelectronics, L6722TR Datasheet - Page 28

• Manufacturer Part Number: L6722TR
• Description: IC BUCK ADJ 2A TRPL 36VFQFPN
• Manufacturer: STMicroelectronics
• Type: Step-Down (Buck)r

Specifications of L6722TR

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 3
• Voltage - Output: Adj to 0.8V
• Current - Output: 2A
• Frequency - Switching: 100kHz
• Voltage - Input: 12V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN, 36-VFQFPN
• Power - Output: 3.5W
• Operating Temperature Range: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5904-2

11 System control loop compensation
11.1
28/34
●
Removing the dependence from the Error Amplifier gain, so assuming this gain high enough,
and with further simplifications, the control loop gain results:
The system Control Loop gain (See
minimize static error and to cross the 0dB axes with a constant -20dB/dec slope with the
desired crossover frequency ω
zero and two poles; both the poles are fixed once the output filter is designed (LC filter
resonance ω
Figure 17. Equivalent control loop block diagram (left) and bode diagram (right).
To obtain the desired shape an R
implementation. A zero at ω
integrator minimizes the static error while placing the zero ω
resonance assures a simple -20dB/dec shape of the gain.
In fact, considering the usual value for the output filter, the LC resonance results to be at
frequency lower than the above reported zero.
Compensation network can be simply designed placing ω
frequency ω
of the switching frequency F
Compensation network guidelines
The Compensation Network design assures to having system response according to the cross-
over frequency selected and to the output filter considered: it is anyway possible to further fine-
tune the compensation network modifying the bandwidth in order to get the best response of
the system as follow:
●
●
PWM
amplitude and has a typical value of 4V.
Increase R
Decrease R
DROOP
OOP
Z
F
(s)
=
T
Z
s ( )
LC
FB
4
-- -
5
as desired obtaining (always considering that ω
FB
(s)
F
Reference
) and the zero (ω
⋅
=
F
=
------------------ -
∆V
–
F
to increase the system bandwidth accordingly;
4
-- -
5
R
R
V
to decrease the system bandwidth accordingly;
R
------------------------------------ -
FB
⋅
F
OSC
IN
FB
--------------------- -
∆V
COMP
C
V
OSC
F
IN
⋅
is the PWM transfer function where ∆V
V
V
VSEN
∆V
IN
OUT
⋅
F
SW
Z
---------------
=1/R
OSC
R
PWM
F
FB
T
s ( )
. Neglecting the effect of Z
):
ESR
⋅
REMOTE BUFFER
F
F
⋅
d V
-C
C
R
------------------------------------------- -
) is fixed by ESR and the Droop resistance.
64k
OUT
5
-- -
4
O
F
Figure
F
R
+
⋅
is then introduced together with an integrator. This
L / N
series network is considered for the Z
O
R
64k
64k
ω
DROOP
+
T
R
-------
3
L
⋅
C
17) is designed in order to obtain a high DC gain to
ESR
O
FBG
FBR
------------------------------------------------------
3
⋅
⋅
V
OUT
-----------------------------------------------------------------------------------------------------------------------------------------------
s
(
2
R
⋅
R
DROOP
C
O
O
⋅
1
L
R
--- -
3
+
L
F
[dB]
F
F
K
s
+
=ω
(s), the transfer function has one
⋅
s
+
F
dB
⋅
T
C
LC
ESR
in correspondence with the L-C
O
might be not higher than 1/10th
OSC
-------------------- -
3
⋅
ω
and imposing the cross-over
LC
⋅
(
L
C
R
=
R
G
ω
is the oscillator ramp
DROOP
O
F
F
LOOP
ω
ESR
+
=
(s)
C
O
---------------------- -
⋅
//R
C
ESR
R
O
O
F
F
+
(s)
⋅
Z
ESR
+
F
(s)
L
-- -
3
C
O
)
⋅
ω
T
R
-------
3
L
ω
L6722