LTC3716EG Linear Technology, LTC3716EG Datasheet - Page 14

• Manufacturer Part Number: LTC3716EG
• Description: IC SW REG STP-DN 5BIT SYNC36SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC3716EG

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.6 ~ 1.75 V
• Current - Output: 35mA
• Frequency - Switching: 120kHz ~ 310kHz
• Voltage - Input: 4 ~ 36 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
LTC3716
(see EXTV
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V
(V
BV
logic-level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
input voltage and maximum output current. When the
LTC3716 is operating in continuous mode the duty factors
for the top and bottom MOSFETs of each output stage are
given by:
The MOSFET power dissipations at maximum output
current are given by:
where is the temperature dependency of R
is a constant inversely related to the gate drive current.
Both MOSFETs have I
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
high current efficiency generally improves with larger
MOSFETs, while for V
increase to the point that the use of a higher R
with lower C
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
14
IN
GS(TH)
DSS
Main Switch Duty Cycle
P
P
Synchronous Switch Duty Cycle
MAIN
SYNC
< 5V); then, sublogic-level threshold MOSFETs
specification for the MOSFETs as well; most of the
< 1V) should be used. Pay close attention to the
k V
CC
V
V
DS(ON)
V
OUT
RSS
IN
IN
Pin Connection). Consequently, logic-level
IN
–
V
2
IN
V
actual provides higher efficiency. The
I
I
OUT
, reverse transfer capacitance C
U
MAX
MAX
2
2
IN
2
R losses but the topside N-channel
> 20V the transition losses rapidly
I
2
MAX
U
C
2
1
RSS
V
V
2
OUT
IN
R
1
f
DS ON
W
(
R
V
)
DS ON
IN
(
DS(ON)
–
V
DS(ON)
IN
IN
V
)
U
< 20V the
OUT
device
and k
RSS
,
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1 + ) is generally given for a MOSFET in the
form of a normalized R
voltage MOSFETs. C
MOSFET characteristics. The constant k = 1.7 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
The Schottky diodes, D1 and D2 shown in Figure 1
conduct during the dead-time between the conduction of
the two large power MOSFETs. This helps prevent the
body diode of the bottom MOSFET from turning on,
storing charge during the dead-time, and requiring a
reverse recovery period which would reduce efficiency. A
1A to 3A Schottky (depending on output current) diode is
generally a good compromise for both regions of opera-
tion due to the relatively small average current. Larger
diodes result in additional transition losses due to their
larger junction capacitance.
C
In continuous mode, the source current of each top
N-channel MOSFET is a square wave of duty cycle V
V
RMS current must be used. The details of a closed form
equation can be found in Application Note 77. Figure 4
shows the input capacitor ripple current for a 2-phase
configuration with the output voltage fixed and input
voltage varied. The input ripple current is normalized
against the DC output current. The graph can be used in
place of tedious calculations. The minimum input ripple
current can be achieved when the input voltage is twice the
output voltage.
In the graph of Figure 4, the 2-phase local maximum input
RMS capacitor currents are reached when:
where k = 1, 2
These worst-case conditions are commonly used for
design because even significant deviations do not offer
IN
IN
= 0.005/ C can be used as an approximation for low
. A low ESR input capacitor sized for the maximum
V
and C
V
OUT
IN
OUT
2
k
Selection
4
1
RSS
DS(ON)
is usually specified in the
vs temperature curve, but
OUT
/