LTC3716EG Linear Technology, LTC3716EG Datasheet - Page 27

IC SW REG STP-DN 5BIT SYNC36SSOP

LTC3716EG

Manufacturer Part Number
LTC3716EG
Description
IC SW REG STP-DN 5BIT SYNC36SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC3716EG

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.6 ~ 1.75 V
Current - Output
35mA
Frequency - Switching
120kHz ~ 310kHz
Voltage - Input
4 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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TYPICAL APPLICATIO
Figure 13 shows a typical application using LTC3716 to
power the mobile CPU core. The input can vary from 7V to
24V, the output voltage can be programmed from 0.6V to
1.75V with a maximum current of 30A. This power supply
receives three input signals to generate different output
voltage offsets based on the operation conditions. With
the AMPMD pin of LTC3716 tied to INTV
provides a regular operational amplifier to implement
PWRGOOD
FMMT3904
C
C
L1, L2: SUMIDA CEP125-1ROMC-H
DPSLP#
IN
OUT
: FOUR CERAMIC CAPS (10 F/35V)
: FOUR PANASONIC SP CAPS EEFUEOD271R (270 F/2V)
R30
10k
Q2
2N7002
3.3V
Q14
FMMT3904
R2
10k
1000pF
0.01 F
0.1 F
0.01 F
R10
3.9k
C12
10k
C5
FMMT3906
C9
R8
C7
INTV
Figure 13. 5V to 20V Input, 0.6V to 1.75V/30A IMVPII Compatible Power Supply with Active Voltage Positioning
330pF
CC
R29
100k
10k
R3
C8
Q1
DPRSLPVR
V
D3
BAT54A
75k, 1%
RON
10k
10k
R17
R4
R1
R15
22k
1N4148
Q13
2N7002
R
432k
845k
c
0.47 F
R
249k
R11
b
1%
OPTIONAL
R
R12
1M
d
, 15.4k, 1%
VID1
47pF
VID0
C15
1000pF
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
C18
R13
10k
1000pF
U
C1
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
RUN/SS
SENSE1
SENSE1
EAIN
PLLFLTR
PLLIN
FCB
i
SGND
V
V
V
SENSE2
SENSE2
ATTENOUT
ATTENIN
VID0
VID1
TH
DIFFOUT
OS
OS
CC
+
LTC3716
+
10
, the LTC3716
+
R23
1 F
C1
BOOST1
BOOST2
AMPMD
PGOOD
EXTV
INTV
PGND
V
SW1
SW2
VID4
VID3
VID2
BG1
BG2
BIAS
TG1
TG2
V
R24
10
CC
CC
IN
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
5V (0PT)
VID4
VID3
VID2
C11
1 F
C6
0.47 F
+
2N7002
2N7002
1
these offsets. When GMUXSEL is low, the output voltage
is offset –1.2% from the VID command voltage. The offset
equals Ra/Rb. When DPSLP# is low, the output voltage is
decreased by approximately 4%. This offset can be in-
creased by decreasing Rc and will be disabled when the
DPRSLPVR signal is high. The optional filtering circuit (Q1
and Q2) is used to mask the PWRGOOD during the VID
transitions.
Q12
BAT54A
C16
0.1 F
C10
10 F
6V
D1
C13, 0.47 F
3
10
10
10
GMUXSEL
R1
R6
R5
INTV
845k
2
R
b
CC
R
4
4
4
4
a
4.99k
5 6 7 8
1 2 3
5 6 7 8
1 2 3
5 6 7 8
1 2 3
5 6 7 8
1 2 3
Q4
IRF7811
Q10
IRF7811
Q3
IRF7811
Q9
IRF7811
4
4
5 6 7 8
1 2 3
5 6 7 8
1 2 3
Q5
IRF7811
Q11
IRF7811
C14
1 F
C3
1 F
D4
MBRS130LT3
0
D2
MBRS130LT3
C
1 H
IN
1 H
L2
L1
3
3
1
1
0.003
R21
0.003
R9
LTC3716
2
2
4
+
4
1 F
C
OUT
10
27
5V TO 22V
R25
10
V
3716 F13
IN
V
GND
FB
FB
OUT
+

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