LTC3716EG Linear Technology, LTC3716EG Datasheet - Page 8

IC SW REG STP-DN 5BIT SYNC36SSOP

LTC3716EG

Manufacturer Part Number
LTC3716EG
Description
IC SW REG STP-DN 5BIT SYNC36SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC3716EG

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.6 ~ 1.75 V
Current - Output
35mA
Frequency - Switching
120kHz ~ 310kHz
Voltage - Input
4 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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LTC3716
PI FU CTIO S
8
RUN/SS (Pin 1): Combination of Soft-Start, Run Control
Input and Short-Circuit Detection Timer. A capacitor to
ground at this pin sets the ramp time to full current output.
Forcing this pin below 0.8V causes the IC to shut down all
internal circuitry. All functions are disabled in shutdown.
SENSE1
Differential Current Comparator. The I
built-in offsets between SENSE
conjunction with R
SENSE1
Differential Current Comparators.
EAIN (Pin 4): Input to the error amplifier that compares the
feedback voltage to the internal 0.6V reference voltage.
This pin is normally connected to a resistive divider from
the output of the differential amplifier (DIFFOUT).
PLLFLTR (Pin 5): The phase-locked loop’s lowpass filter
is tied to this pin. Alternatively, this pin can be driven with
an AC or DC voltage source to vary the frequency of the
internal oscillator. Do not apply voltage to this pin prior to
application of V
PLLIN (Pin 6): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with
50k . The phase-locked loop will force the rising top gate
signal of controller 1 to be synchronized with the rising
edge of the PLLIN signal.
FCB (Pin 7): Forced Continuous Control Input. This input
acts on both output stages and can be used to regulate a
secondary winding. Pulling this pin below 0.6V will force
continuous synchronous operation. Do not leave this pin
floating without a decoupling capacitor.
I
tor Compensation Point. Both current comparator’s thresh-
olds increase with this control voltage. The normal voltage
range of this pin is from 0V to 2.4V
SGND (Pin 9): Signal Ground. This pin is common to both
controllers. Route separately to the PGND pin.
V
pin provides true remote output voltage sensing. V
normally drives an external resistive divider that sets the
output voltage.
TH
DIFFOUT
U
(Pin 8): Error Amplifier Output and Switching Regula-
+
, SENSE2
, SENSE2
(Pin 10): Output of a Differential Amplifier. This
U
IN
.
SENSE
+
U
(Pins 2,14): The (+) Input to Each
(Pins 3,13): The (–) Input to the
set the current trip threshold.
and SENSE
TH
pin voltage and
+
pins in
DIFFOUT
V
fier. Internal precision resistors configure it as a differen-
tial amplifier whose output is V
ATTENOUT (Pin 15): Voltage Feedback Signal Resistively
Divided According to the VID Programming Code.
ATTENIN (Pin 16): The Input to the VID Controlled Resis-
tive Divider.
VID0–VID4 (Pins 17,18, 19, 20, 21): VID Control Logic
Input Pins.
V
AMPMD (Pin 23): This Logic Input pin controls the con-
nections of internal precision resistors that configure the
operational amplifier as a unity-gain differential amplifier.
TG2, TG1 (Pins 24, 35): High Current Gate Drives for Top
N-Channel MOSFETS. These are the outputs of floating
drivers with a voltage swing equal to INTV
posed on the switch node voltage SW.
SW2, SW1 (Pins 25, 34): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to V
BOOST2, BOOST1 (Pins 26, 33): Bootstrapped Supplies
to the Topside Floating Drivers. External capacitors are con-
nected between the BOOST and SW pins, and Schottky
diodes are connected between the BOOST and INTV
BG2, BG1 (Pins 27, 31): High Current Gate Drives for
Bottom N-Channel MOSFETS. Voltage swing at these pins
is from ground to INTV
PGND (Pin 28): Driver Power Ground. Connect to sources
of bottom N-channel MOSFETS and the (–) terminals of C
INTV
Dropout Regulator and the EXTV
control circuits are powered from this voltage source.
Decouple to power ground with a 1 F ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7 F
additional tantalum or other low ESR capacitor.
EXTV
Switch. This switch closes and supplies INTV
ing the internal low dropout regulator whenever EXTV
higher than 4.7V. See EXTV
tions Information section. Do not exceed 7V on this pin
and ensure V
OS
BIAS
, V
CC
CC
(Pin 22): Supply Pin for the VID Control Circuit.
OS
(Pin 29): Output of the Internal 5V Linear Low
(Pin 30): External Power Input to an Internal
+
(Pins 11, 12): Inputs to an Operational Ampli-
EXTVCC
V
CC
INTVCC
.
CC
.
Connection in the Applica-
DIFFOUT
CC
Switch. The driver and
.
CC
CC,
superim-
IN
bypass-
CC
.
pins.
CC
IN
is
.

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