L6727 STMicroelectronics, L6727 Datasheet - Page 19

IC PWM CTLR SGL PHASE SO-8

L6727

Manufacturer Part Number
L6727
Description
IC PWM CTLR SGL PHASE SO-8
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of L6727

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
Adj to 0.8V
Frequency - Switching
300kHz
Voltage - Input
1.5 ~ 12 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Output Current
1.5 A
Input Voltage
- 0.3 V to + 15 V
Switching Frequency
300 KHz
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Duty Cycle (max)
80 %
For Use With
497-8266 - BOARD EVAL BASED ON L6727497-6258 - BOARD EVAL 1PH STPDWN CONV L6727
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Power - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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L6727
9.4
Embedding L6727-based VRs
When embedding the VR into the application, additional care must be taken since the whole
VR is a switching DC/DC regulator and the most common system in which it has to work is a
digital system such as MB or similar. In fact, latest MBs have become faster and more
powerful: high speed data busses are more and more common and switching-induced noise
produced by the VR can affect data integrity if additional layout guidelines are not followed.
Few easy points must be considered mainly when routing traces in which switching high
currents flow (switching high currents cause voltage spikes across the stray inductance of
the traces causing noise that can affect the near traces):
When reproducing high current path on internal layers, keep all layers the same size in order
to avoid "surrounding" effects that increase noise coupling.
Keep safe guard distance between high current switching VR traces and data busses,
especially if high-speed data busses, to minimize noise coupling.
Keep safe guard distance or filter properly when routing bias traces for I/O sub-systems that
must walk near the VR.
Possible causes of noise can be located in the PHASE connections, MOSFETs gate drive
and Input voltage path (from input bulk capacitors and HS drain). Also GND connection
must be considered if not insisting on a power ground plane. These connections must be
carefully kept far away from noise-sensitive data busses.
Since the generated noise is mainly due to the switching activity of the VR, noise emissions
depend on how fast the current switches. To reduce noise emission levels, it is also possible,
in addition to the previous guidelines, to reduce the current slope and thus to increase the
switching times: this will cause, as a consequence of the higher switching time, an increase
in switching losses that must be considered in the thermal design of the system.
Doc ID 12933 Rev 4
Application details
19/34

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