MT8VDDT6464AG-335F3 Micron Technology Inc, MT8VDDT6464AG-335F3 Datasheet - Page 16

• Manufacturer Part Number: MT8VDDT6464AG-335F3
• Description: MODULE DDR SDRAM 512MB 184-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT8VDDT6464AG-335F3

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 14: I
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 48; notes appear on pages 19–22; 0°C ≤ T
Table 15: Capacitance
Note: 11; notes appear on pages 19–22
pdf: 09005aef80867ab3, source: 09005aef80867a99
DD8C16_32_64x64AG.fm - Rev. G 9/04 EN
OPERATING CURRENT: One device bank; Active-Precharge;
(MIN);
cycle; Address and control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active-Read-Pre-charge; Burst
= 4;
inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle;
Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
t
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active;
Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank;
Active-Precharge;
inputs changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One device
bank active; Address and control inputs changing once per clock cycle;
t
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device
bank active; Address and control inputs changing once per clock cycle;
t
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (BL = 4)
with auto precharge,
Address and control inputs change only during Active, READ, or WRITE
commands
Input/Output Capacitance: DQ, DQS
Input Capacitance: Command and Address, S#, CKE
Input Capacitance: CK0, CK0# (Standard PCB)
Input Capacitance: CK1, CK1#; CK2, CK2# (Standard PCB)
CK =
CK =
CK =
t
RC =
t
t
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
t
CK (MIN); CKE = HIGH; Address and other control inputs
CK (MIN); I
CK =
t
RC (MIN);
t
CK (MIN); DQ, DM, and DQS inputs changing once per clock
DD
OUT
t
RC =
t
t
Specifications and Conditions – 512MB
t
CK =
CK =
t
CK =
= 0mA
RC = minimum
PARAMETER/CONDITION
t
RAS (MAX);
t
t
t
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
CK (MIN); I
PARAMETER
IN
= V
t
CK =
t
RC allowed;
REF
OUT
for DQ, DQS, and DM
= 0mA; Address and control
t
CK (MIN); DQ, DM, and DQS
t
CK =
t
t
REFC =
REFC = 7.8125µs
t
CK (MIN);
t
t
RC =
RFC (MIN)
16
A
≤ +70°C; V
t
128MB, 256MB, 512MB (x64, SR)
RC
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
I
I
I
SYM
I
I
I
I
DD 4 W
I
I
DD 3 N
DD 4 R
I
DD 5 A
I
I
DD 2 P
DD 2 F
DD 3 P
DD
DD 0
DD 1
DD 5
DD 6
DD 7
= V
SYMBOL
DD
1,040
1,280
1,320
1,400
2,320
3,240
-335
360
280
400
C
40
80
40
C
C
C
Q = +2.5V ±0.2V
IO
I
I
I
1
2
3
MAX
1,040
1,280
1,320
1,240
2,320
3,200
-262
360
280
400
40
80
40
MIN
16.0
10.0
-26A/
4.0
9.0
1,160
1,160
1,080
2,240
2,800
-265
920
320
240
360
40
80
40
MAX
24.0
12.0
12.0
5.0
UNITS
©2004 Micron Technology. Inc.
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
UNITS
NOTES
21, 28,
21, 28,
20, 42
20, 42
20, 42
20, 44
24, 44
20, 43
pF
pF
pF
pF
44
45
44
41
20
9