MA180023 Microchip Technology, MA180023 Datasheet - Page 106

• Manufacturer Part Number: MA180023
• Description: MODULE PLUG-IN PIC18F46J11 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180023

• Accessory Type: Plug-In Module (PIM) - PIC18F46J11
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: PIC18
• Supported Devices: Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
• For Use With: DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F46J11 FAMILY
6.5.3
Depending on the application, good programming
practice may dictate that the value written to the
memory should be verified against the original value.
This should be used in applications where excessive
writes can stress bits near the specification limit.
6.5.4
If a write is terminated by an unplanned event, such as
loss of power or an unexpected Reset, the memory
location just programmed should be verified and
TABLE 6-2:
DS39932C-page 106
TBLPTRU
TBPLTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>)
TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
TABLAT
INTCON
EECON2 Program Memory Control Register 2 (not a physical register)
EECON1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during Flash program memory access.
Name
WRITE VERIFY
UNEXPECTED TERMINATION OF
WRITE OPERATION
Program Memory Table Latch
GIE/GIEH PEIE/GIEL TMR0IE
Bit 7
—
—
REGISTERS ASSOCIATED WITH PROGRAM FLASH MEMORY
Bit 6
—
—
WPROG
bit 21
Bit 5
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>)
INT0IE
FREE
Bit 4
WRERR
RBIE
Bit 3
reprogrammed if needed. If the write operation is
interrupted by a MCLR Reset or a WDT time-out Reset
during normal operation, the user can check the
WRERR bit and rewrite the location(s) as needed.
6.6
See Section 25.6 “Program Verification and Code
Protection” for details on code protection of Flash
program memory.
TMR0IF
WREN
Flash Program Operation During
Code Protection
Bit 2
INT0IF
Bit 1
WR
© 2009 Microchip Technology Inc.
Bit 0
RBIF
—
Values on
Reset
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