PIC12F635-I/P Microchip Technology, PIC12F635-I/P Datasheet - Page 189

• Manufacturer Part Number: PIC12F635-I/P
• Description: IC MCU FLASH 1KX14 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/SPI/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029, DV164101, DM163014
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSAC162057 - MPLAB ICD 2 HEADER 14DIPACICE0201 - MPLABICE 8P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.11 AC Characteristics: Analog Front-End for PIC16F639 (Industrial)
© 2007 Microchip Technology Inc.
AC CHARACTERISTICS
Param
AF01
AF02
AF03
AF04
AF05
AF06
AF07
AF08
AF09
AF10
AF11
AF12
AF13
Note 1:
No.
*
†
2:
F
V
V
V
CARRIER
C
C
C
IN
F
Sym.
R
S
SENSE
C_Q
Parameter is characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Required output enable filter high time must account for input path analog delays (= T
Required output enable filter low time must account for input path analog delays (= T
T
DE
T
TUNX
TUNY
TUNZ
MOD
FLM
ADJ
_
DR
DF
MOD
_
Q
LC Input Sensitivity
Coil de-Q’ing Voltage -
RF Limiter (R
RF Limiter Turn-on Resistance
(LCX, LCY, LCZ)
Sensitivity Reduction
Minimum Modulation Depth
75% ± 12%
50% ± 12%
25% ± 12%
12% ± 12%
LCX Tuning Capacitor
LCY Tuning Capacitor
LCZ Tuning Capacitor
Carrier frequency
Input modulation frequency
Q of Trimming Capacitors
Demodulator Charge Time
(delay time of demodulated output
to rise)
Demodulator Discharge Time
(delay time of demodulated output
to fall)
Characteristic
FLM
) must be active
Standard Operating Conditions (unless otherwise stated)
Supply Voltage
Operating temperature
LC Signal Input
Carrier Frequency
LCCOM connected to V
Min
50*
63
38
13
44
44
44
PIC12F635/PIC16F636/639
—
—
—
—
—
—
—
—
—
—
1
3
0
Typ†
300
125
-30
3.0
75
50
25
12
63
63
63
50
50
—
—
—
0
0
0
0
SS
Max
700
87
62
37
24
82
82
82
10
—
—
—
—
—
—
—
—
—
6
5
2.0V
-40°C
Sinusoidal 300 mV
125 kHz
Units
mV
Ohm
kHz
kHz
OEL
dB
dB
pF
pF
pF
pF
pF
pF
pF
%
%
%
%
V
OEH
s
s
PP
V
T
DD
+ T
AMB
- T
V
Output enable filter disabled
AGCSIG = 0; MODMIN = 00
(33% modulation depth setting)
Input = Continuous Wave (CW)
Output = Logic level transition from low-to-
high at sensitivity level for CW input.
V
V
V
No sensitivity reduction selected
Max reduction selected
Monotonic increment in attenuation value from
setting = 0000 to 1111 by design
V
V
Config. Reg. 1, bits <6:1> Setting = 000000
63 pF +/- 30%
Config. Reg. 1, bits <6:1> Setting = 111111
63 steps, 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
V
Config. Reg. 2, bits <6:1> Setting = 000000
63 pF +/- 30%
Config. Reg. 2, bits <6:1> Setting = 111111
63 steps, 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
V
Config. Reg. 3, bits<6:1> Setting = 000000
63 pF +/- 30%
Config. Reg. 3, bits<6:1> Setting = 111111
63 steps, 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
Characterized at bench.
Input data rate, characterized at bench.
Characterized at bench test
V
MOD depth setting = 50%
Input conditions:
Amplitude = 300 mV
Modulation depth = 80%
V
MOD depth setting = 50%
Input conditions:
Amplitude = 300 mV
Modulation depth = 80%
DR
DR
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
3.6V
- T
+ T
+85°C for industrial
= 3.0V
= 3.0V, Force I
= 2.0V, V
= 3.0V
= 3.0V
= 3.0V,
= 3.0V,
= 3.0V,
= 3.0V
= 3.0V
DF
PP
DF
).
).
IN
= 8 VDC
Conditions
IN
PP
PP
= 5 A
DS41232D-page 187