PIC12F635-I/P Microchip Technology, PIC12F635-I/P Datasheet - Page 48

• Manufacturer Part Number: PIC12F635-I/P
• Description: IC MCU FLASH 1KX14 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/SPI/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029, DV164101, DM163014
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSAC162057 - MPLAB ICD 2 HEADER 14DIPACICE0201 - MPLABICE 8P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F635/PIC16F636/639
FIGURE 3-9:
TABLE 3-2:
DS41232D-page 46
CONFIG
INTCON
OSCCON
OSCTUNE
PIE1
PIR1
Legend:
Note 1:
Clock Monitor Output
Name
2:
3:
Sample Clock
(2)
Note:
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
See
PIC16F636/639 only.
System
Output
OSFIF
Clock
Configuration Word register (CONFIG) for operation of all register bits.
EEIE
EEIF
Bit 7
CPD
GIE
—
—
(Q)
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
FSCM TIMING DIAGRAM
IRCF2
LVDIE
LVDIF
Bit 6
PEIE
CP
—
MCLRE
IRCF1
CRIE
CRIF
Bit 5
T0IE
—
Test
PWRTE
C2IE
C2IF
IRCF0
TUN4
INTE
Bit 4
(3)
(3)
WDTE
OSTS
TUN3
RAIE
Bit 3
C1IE
C1IF
FOSC2
OSFIE
OSFIF
TUN2
Bit 2
T0IF
HTS
Test
Oscillator
Failure
FOSC1
TUN1
Bit 1
INTF
LTS
—
—
TMR1IE
TMR1IF
FOSC0
TUN0
RAIF
Bit 0
SCS
© 2007 Microchip Technology Inc.
Detected
0000 000x
-110 x000
---0 0000
000- 00-0
000- 00-0
POR, BOR
Value on
Failure
—
Test
0000 000x
-110 x000
---u uuuu
000- 00-0
000- 00-0
Resets
Value on
all other
—
(1)