PIC18F1230-I/SO Microchip Technology, PIC18F1230-I/SO Datasheet - Page 188

• Manufacturer Part Number: PIC18F1230-I/SO
• Description: IC PIC MCU FLASH 2KX16 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1230-I/SO

• Core Size: 8-Bit
• Program Memory Size: 4KB (2K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 40MHz
• No. Of Timers: 2
• Package: 18SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Interface Type: USART
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 2
• Processor Series: PIC18F
• Core: PIC
• Data Ram Size: 256 B
• Maximum Clock Frequency: 40 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• Height: 2.31 mm
• Length: 11.53 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 7.49 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F1230/1330
The module is enabled by setting the LVDEN bit. Each
time that the LVD module is enabled, the circuitry
requires some time to stabilize. The IRVST bit is a
read-only bit and is used to indicate when the circuit is
stable. The module can only generate an interrupt after
the circuit is stable and IRVST is set.
19.1
When the LVD module is enabled, a comparator uses
an internally generated reference voltage as the set
point. The set point is compared with the trip point,
where each node in the resistor divider represents a
FIGURE 19-1:
DS39758D-page 188
Operation
LVD MODULE BLOCK DIAGRAM
BORENx
LVDEN
V
DD
LVDL3:LVDL0
Internal Voltage
trip point voltage. The “trip point” voltage is the voltage
level at which the device detects a low-voltage event
depending on the configuration of the module. When
the supply voltage is equal to the trip point, the voltage
tapped off of the resistor array is equal to the internal
reference voltage generated by the voltage reference
module. The comparator then generates an interrupt
signal by setting the LVDIF bit.
The trip point voltage is software programmable to any 1 of
15 values. The trip point is selected by programming the
LVDL3:LVDL0 bits (LVDCON<3:0>).
Reference
LVDEN
LVDCON
Register
 2009 Microchip Technology Inc.
LVDIF
Set