PIC16F74-I/P Microchip Technology, PIC16F74-I/P Datasheet - Page 231

IC MCU FLASH 4KX14 A/D 40DIP

PIC16F74-I/P

Manufacturer Part Number
PIC16F74-I/P
Description
IC MCU FLASH 4KX14 A/D 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F74-I/P

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16F
No. Of I/o's
33
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
40PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
33
Interface Type
I2C/SPI/USART
On-chip Adc
8-chx8-bit
Number Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Ram Size
192 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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15.3.5
SS
SCK (CKP = 0,
SCK (CKP = 1,
Write to
SSPBUF
SDO
SDI
(SMP = 0)
Input
Sample (SMP = 0)
optional
SSPIF
SSPSR to
SSPBUF
1997 Microchip Technology Inc.
CKE = 0)
CKE = 0)
Slave Operation
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched, the interrupt flag bit SSPIF is set.
The clock polarity is selected by appropriately programming bit CKP (SSPCON<4>). This then
would give waveforms for SPI communication as shown in
Figure 15-5
the minimum high and low times.
In sleep mode, the slave can transmit and receive data. When a byte is received, the device will
wake-up from sleep, if the interrupt is enabled.
Figure 15-4:
bit7
bit7
where the MSb is transmitted first. When in slave mode the external clock must meet
SPI Mode Waveform (Slave Mode With CKE = 0)
bit6
bit5
bit4
bit3
Section 15. SSP
bit2
Figure
bit1
15-3,
bit0
DS31015A-page 15-11
bit0
Figure
Next Q4 Cycle
after Q2
15-4, and
15

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