PIC16F74-I/P Microchip Technology, PIC16F74-I/P Datasheet - Page 308

IC MCU FLASH 4KX14 A/D 40DIP

PIC16F74-I/P

Manufacturer Part Number
PIC16F74-I/P
Description
IC MCU FLASH 4KX14 A/D 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F74-I/P

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16F
No. Of I/o's
33
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
40PDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
33
Interface Type
I2C/SPI/USART
On-chip Adc
8-chx8-bit
Number Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Ram Size
192 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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PICmicro MID-RANGE MCU FAMILY
17.4.9
17.4.9.1
DS31017A-page 17-32
I
WCOL Status Flag
2
C Master Mode Start Condition Timing
To initiate a START condition the user sets the start condition enable bit, SEN (SSPCON2<0>).
If the SDA and SCL pins are sampled high, the baud rate generator is re-loaded with the contents
of SSPADD<6:0>, and starts its count. If SCL and SDA are both sampled high when the baud
rate generator times out (T
low while SCL is high is the START condition, and causes the S bit (SSPSTAT<3>) to be set. Fol-
lowing this, the baud rate generator is reloaded with the contents of SSPADD<6:0> and resumes
its count. When the baud rate generator times out (T
automatically cleared by hardware, the baud rate generator is suspended leaving the SDA line
held low, and the START condition is complete.
If the user writes the SSPBUF when an START sequence is in progress, then WCOL is set and
the contents of the buffer are unchanged (the write doesn’t occur).
Figure 17-20: First Start Bit Timing
Note:
Note:
Write to SEN bit occurs here.
If at the beginning of START condition the SDA and SCL pins are already sampled
low, or if during the START condition the SCL line is sampled low before the SDA
line is driven low, a bus collision occurs, the Bus Collision Interrupt Flag,BCLIF, is
set, the START condition is aborted, and the I
Because queueing of events is not allowed, writing to the lower 5 bits of SSPCON2
is disabled until the START condition is complete.
SDA
SCL
BRG
Preliminary
), the SDA pin is driven low. The action of the SDA being driven
SDA = 1,
SCL = 1
T
BRG
Set S bit (SSPSTAT<3>)
S
T
BRG
At completion of start bit,
Hardware clears SEN bit
BRG
and sets SSPIF bit
2
) the SEN bit (SSPCON2<0>) will be
C module is reset into its IDLE state.
T
Write to SSPBUF occurs here
BRG
1st Bit
1997 Microchip Technology Inc.
T
BRG
2nd Bit

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