AT91SAM9XE128-QU Atmel, AT91SAM9XE128-QU Datasheet - Page 846

MCU ARM9 128K FLASH 208-PQFP

AT91SAM9XE128-QU

Manufacturer Part Number
AT91SAM9XE128-QU
Description
MCU ARM9 128K FLASH 208-PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9XE128-QU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
96
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9XE128-QU
Manufacturer:
Atmel
Quantity:
10 000
846
Doc
Rev.
6254C
AT91SAM9XE128/256/512 Preliminary
Comments (Continued)
Electrical Characteristics:
Table 43-2, “DC
I
Table 43-5, “Power Consumption for Different
deactivated”. Footnote
Section 43.8 “Core Power Supply POR
Table 43-25, “Maximum MCK Frequency vs. Embedded Flash Wait
Table 43-18, “PLLB
Table 43-24, “Power-On-Reset
Section 43.9 “Power-up
Section 43.10 “Power-down
Section 43.12.1 “Timing
Table
Section 43.13.1 “Timing
Table 43-32
Section 43.15.3.1 “Timing
Table 43-44
“SPI”,
Errata:
Section 46.2.2 “Error Corrected Code Controller
NRD/NWE
Section 46.2.3 “MultiMedia Card Interface (MCI)”
“MCI: Data Timeout Error Flag”, removed from errata.
“MCI: Small Block
“MCI: old SDCard
“RSTC: Reset During SDRAM Accesses”, removed from errata.
Section 46.2.6 “Serial Peripheral Interface (SPI)”
“SPI: Baudrate Set to 1”, removed from errata.
“SPI: Inaccurate RHR.PCS in Variable
Section 46.2.7 “Serial Synchronous Controller (SSC)”
“SSC: Periodic Transmission Limitations in Master Mode”, removed from errata.
“SSC: Clock is Transmitted before the SSC is Enabled, removed from errata.
“SSC: Delay on TD (transmit data
“SSC: Data sent without any frame
Section 46.2.8 “Two-wire Interface (TWI)”
“TWI: Software
“TWI: Overrun in Master Read
Section 46.2.10 “Universal Synchronous Asycnchronous Receiver Transmitter (USART)”
“USART: Slave Synchronous
“USART: Number of Errors Register (US_NER) ISO7816 error
O
output current for PA0-PA31 PB0-PB31 PC0-PC3 is 8 mA.
43-27, updated: Corner removed from capacitance load table.
Figure
pulse”, added to errata.
and
updated: Corner removed from capacitance load table.
43-6,
Reset”, added to errata.
Characteristics”, Min pull up resistance values updated.
Table 43-32
Reading”, added to errata.
Compatibility”, added to errata.
Figure
Characteristics”, startup time added.
(1)
Sequence”, instructions updated. schematic removed.
Conditions”, updated: SMC timings are given in worst case conditions.
Conditions”, updated: SDRAMC timings are given in worst case conditions.
removed from title.
43-7,
Conditions”, updated: SSC timings are given in worst case conditions.
Sequence”, instructions updated.
updated: Corner removed from capacitance load tables.
Mode”, added to errata.
Mode”, added to errata.
Characteristics”, irrelevant rows removed.
Figure
signal)”, added to errata.
synchro”, added to errata.
Mode”, added to errata.
43-8,
Characteristics”, updated this section.
Figure
Modes”, Active mode updated: “all peripheral clocks
(ECC)”,
43-9, confusing titles to SPI timing diagrams simplified.
“ECC: Computation with a 1 clock cycle long
number”, added to errata.
States”, updated.
6254C–ATARM–22-Jan-10
Change
Request
Ref.
6602
rfo
6343
6883
6386
6957
6957/6963
rfo
6872/6766
6465/6889
6889
6889
6889
6889
6889
6889
6465/6889
6889
6889
6465/6889

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