ST62T20CB6 STMicroelectronics, ST62T20CB6 Datasheet - Page 34

IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part Number
ST62T20CB6
Description
IC MCU 8BIT OTP 4K 20 PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
12
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2098-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST62T20CB6
Manufacturer:
OPTEK
Quantity:
1 400
ST6208C/ST6209C/ST6210C/ST6220C
6.3 STOP MODE
STOP mode is the lowest power consumption
mode of the MCU (see
The MCU goes into STOP mode as soon as the
STOP instruction is executed. This has the follow-
ing effects:
– Program execution is stopped, the microcontrol-
– The contents of RAM and the peripheral regis-
– The oscillator is stopped, so peripherals cannot
Exit from STOP Mode
The MCU remains in STOP mode until one of the
following events occurs:
– RESET (Watchdog, LVD or RESET pin)
– A peripheral interrupt (assuming this peripheral
– An external interrupt (I/O port, NMI)
In all cases a delay of 2048 clock cycles (f
generated to make sure the oscillator has started
properly.
34/104
1
ler can be considered as being “frozen”.
ters are kept safely as long as the power supply
voltage is higher than the RAM retention voltage.
work except the those that can be driven by an
external clock.
can be driven by an external clock)
Figure
22).
INT
) is
The Program Counter then points to the starting
address of the interrupt or RESET service routine
(see
STOP Mode and Watchdog
When the Watchdog is active (hardware or soft-
ware activation), the STOP instruction is disabled
and a WAIT instruction will be executed in its place
unless the EXCTNL option bit is set to 1 in the op-
tion bytes and a a high level is present on the NMI
pin. In this case, the STOP instruction will be exe-
cuted and the Watchdog will be frozen.
Figure 21. STOP Mode Timing Overview
INSTRUCTION
RUN
Figure
STOP
STOP
INTERRUPT
21).
RESET
OR
CLOCK
DELAY
2048
CYCLE
VECTOR
FETCH
RUN

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