ST62T20CB6 STMicroelectronics, ST62T20CB6 Datasheet - Page 49

IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part Number
ST62T20CB6
Description
IC MCU 8BIT OTP 4K 20 PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
12
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2098-5
8-BIT TIMER (Cont’d)
8.2.4.2 Event Counter Mode
(TOUT = “0”, DOUT = “0”)
In this mode, the TIMER pin is the input clock of
the Timer prescaler which is decremented on eve-
ry rising edge of the input clock (allowing event
count). See
This mode is selected by clearing the TOUT bit in
the TSCR register (i.e. as input) and clearing the
DOUT bit.
Note: In this mode, if the TIMER pin is multi-
plexed, the corresponding port control bits have to
be set in input with pull-up configuration.
Figure 30. f
Figure 31. Event Counter Mode Operation
8.2.4.3 Output Mode
(TOUT = “1”, DOUT = “data out”)
In Output mode, the TIMER pin is connected to the
DOUT latch, hence the Timer prescaler is clocked
by the prescaler clock input (f
The user can select the prescaler division ratio us-
ing the PS[2:0] bits in the TSCR register. When TCR
decrements to zero, it sets the TMZ bit in the TSCR.
The TMZ bit can be tested under program control to
perform a timer function whenever it goes high and
has to be cleared by the user. The low-to-high TMZ
TIMER PIN
COUNTER VALUE
XX2
XX1
TIMER
VALUE 1
TIMER
Figure 30
Clock in Event Counter Mode
and
Figure
f
PRESCALER
INT
/12). See
VALUE 2
31.
Figure
32.
bit transition is used to latch the DOUT bit in the
TSCR and, if the TOUT bit is set, DOUT is trans-
ferred to the TIMER pin. This operating mode allows
external signal generation on the TIMER pin. See
Figure
This mode is selected by setting the TOUT bit in
the TSCR register (i.e. as output) and setting the
DOUT bit to output a high level or clearing the
DOUT bit to output a low level.
Note: As soon as the TOUT bit is set, The timer
pin is configured as output push-pull regardless of
the corresponding I/O port control registers setting
(if the TIMER pin is multiplexed).
Figure 32. Output Mode Control
Figure 33. Output Mode Operation
FFh
TIMER PIN
Counter
1
ST6208C/ST6209C/ST6210C/ST6220C
TIMER
33.
1
Default output value is 0
st
downcount:
TMZ
TOUT DOUT
At each zero event
DOUT has to be
copied to the TIMER
pin
LATCH
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