ST62T20CB6 STMicroelectronics, ST62T20CB6 Datasheet - Page 58

IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part Number
ST62T20CB6
Description
IC MCU 8BIT OTP 4K 20 PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
12
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2098-5

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ST6208C/ST6209C/ST6210C/ST6220C
INSTRUCTION SET (Cont’d)
Arithmetic and Logic. These instructions are
used to perform arithmetic calculations and logic
operations. In AND, ADD, CP, SUB instructions
one operand is always the accumulator while, de-
pending on the addressing mode, the other can be
Table 18. Arithmetic & Logic Instructions
Notes:
X,Y
V, W Short Direct Registers
Δ
58/104
1
ADD A, (X)
ADD A, (Y)
ADD A, rr
ADDI A, #N
AND A, (X)
AND A, (Y)
AND A, rr
ANDI A, #N
CLR A
CLR r
COM A
CP A, (X)
CP A, (Y)
CP A, rr
CPI A, #N
DEC X
DEC Y
DEC V
DEC W
DEC A
DEC rr
DEC (X)
DEC (Y)
INC X
INC Y
INC V
INC W
INC A
INC rr
INC (X)
INC (Y)
RLC A
SLA A
SUB A, (X)
SUB A, (Y)
SUB A, rr
SUBI A, #N
Index Registers
Affected
Instruction
Indirect
Indirect
Direct
Immediate
Indirect
Indirect
Direct
Immediate
Short Direct
Direct
Inherent
Indirect
Indirect
Direct
Immediate
Short Direct
Short Direct
Short Direct
Short Direct
Direct
Direct
Indirect
Indirect
Short Direct
Short Direct
Short Direct
Short Direct
Direct
Direct
Indirect
Indirect
Inherent
Inherent
Indirect
Indirect
Direct
Immediate
Addressing Mode
Bytes
1
1
2
2
1
1
2
2
2
3
1
1
1
2
2
1
1
1
1
2
2
1
1
1
1
1
1
2
2
1
1
1
2
1
1
2
2
either a data space memory location or an imme-
diate value. In CLR, DEC, INC instructions the op-
erand can be any of the 256 data space address-
es. In COM, RLC, SLA the operand is always the
accumulator.
# Immediate data (stored in ROM memory)
*
rr Data space register
Not Affected
Cycles
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
Z
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
*
Flags
C
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*

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