ST62T20CB6 STMicroelectronics, ST62T20CB6 Datasheet - Page 37

IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part Number
ST62T20CB6
Description
IC MCU 8BIT OTP 4K 20 PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
12
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2098-5
7 I/O PORTS
7.1 INTRODUCTION
Each I/O port contains up to 8 pins. Each pin can
be programmed independently as digital input
(with or without pull-up and interrupt generation),
digital output (open drain, push-pull) or analog in-
put (when available).
The I/O pins can be used in either standard or al-
ternate function mode.
Standard I/O mode is used for:
Alternate function mode is used for:
The generic I/O block diagram is shown in
23.
7.2 FUNCTIONAL DESCRIPTION
Each port is associated with 3 registers located in
Data space:
– Data Register (DR)
– Data Direction Register (DDR)
– Option Register (OR)
Each I/O pin may be programmed using the corre-
sponding register bits in the DDR, DR and OR reg-
isters: bit x corresponding to pin x of the port.
9
can be selected by user software.
During MCU initialization, all I/O registers are
cleared and the input mode with pull-up and no in-
terrupt generation is selected for all the pins, thus
avoiding pin conflicts.
7.2.1 Digital Input Modes
The input configuration is selected by clearing the
corresponding DDR register bit.
In this case, reading the DR register returns the
digital value applied to the external I/O pin.
Different input modes can be selected by software
through the DR and OR registers, see
External Interrupt Function
illustrates the various port configurations which
– Transfer of data through digital inputs and out-
– External interrupt generation
– Alternate signal input/output for the on-chip
puts (on specific pins):
peripherals
Table
Figure
Table
9.
All input lines can be individually connected by
software to the interrupt system by programming
the OR and DR registers accordingly. The inter-
rupt trigger modes (falling edge, rising edge and
low level) can be configured by software for each
port as described in the Interrupt section.
7.2.2 Analog Inputs
Some pins can be configured as analog inputs by
programming the OR and DR registers according-
ly, see
ed to the on-chip 8-bit Analog to Digital Converter.
Caution: ONLY ONE pin should be programmed
as an analog input at any time, since by selecting
more than one input simultaneously their pins will
be effectively shorted.
7.2.3 Output Modes
The output configuration is selected by setting the
corresponding DDR register bit. In this case, writ-
ing to the DR register applies this digital value to
the I/O pin through the latch. Then, reading the DR
register returns the previously stored value.
Two different output modes can be selected by
software through the OR register: push-pull and
open-drain.
DR register value and output pin status:
Note: The open drain setting is not a true open
drain. This means it has the same structure as the
push-pull setting but the P-buffer is deactivated.
To avoid damaging the device, please respect the
V
Electrical Characteristics section.
7.2.4 Alternate Functions
When an on-chip peripheral is configured to use a
pin, the alternate function (timer input/output...) is
not systematically selected but has to be config-
ured through the DDR, OR and DR registers. Re-
fer to the chapter describing the peripheral for
more details.
OUT
DR
0
1
ST6208C/ST6209C/ST6210C/ST6220C
absolute maximum rating described in the
Table
9. These analog inputs are connect-
Push-pull
V
V
DD
SS
Open-drain
Floating
V
SS
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1

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