MC908SR12MFAE Freescale Semiconductor, MC908SR12MFAE Datasheet - Page 147
![IC MCU 12K FLASH 8MHZ 48-LQFP](/photos/12/19/121901/mc908sr12mfae_sml.jpg)
MC908SR12MFAE
Manufacturer Part Number
MC908SR12MFAE
Description
IC MCU 12K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908SR12MFAE.pdf
(404 pages)
Specifications of MC908SR12MFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
31
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
MC908SR12MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC908SR12MFAER
Manufacturer:
Freescale Semiconductor
Quantity:
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9.4.1 External Pin Reset
9.4.2 Active Resets from Internal Sources
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
NOTE:
The RST pin circuit includes an internal pull-up device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the SIM
reset status register (SRSR) is set as long as RST is held low for a
minimum of 67 ICLK cycles, assuming that neither the POR nor the LVI
was the source of the reset. See
Figure 9-4
All internal reset sources actively pull the RST pin low for 32 ICLK cycles
to allow resetting of external peripherals. The internal reset signal IRST
continues to be asserted for an additional 32 cycles (see Figure 9-5). An
internal reset can be caused by an illegal address, illegal opcode, COP
timeout, LVI, or POR (see Figure 9-6).
For LVI or POR resets, the SIM cycles through 4096 + 32 ICLK cycles
during which the SIM forces the RST pin low. The internal reset signal
then follows the sequence from the falling edge of RST shown in
Figure
ICLK
RST
IAB
Reset Type
All others
POR/LVI
9-5.
PC
System Integration Module (SIM)
shows the relative timing.
Figure 9-4. External Reset Timing
Table 9-2. PIN Bit Set Timing
Number of Cycles Required to Set PIN
Table 9-2
4163 (4096 + 64 + 3)
67 (64 + 3)
for details.
System Integration Module (SIM)
Reset and System Initialization
VECT H VECT L
Data Sheet
147
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