MC908SR12MFAE Freescale Semiconductor, MC908SR12MFAE Datasheet - Page 74

• Manufacturer Part Number: MC908SR12MFAE
• Description: IC MCU 12K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908SR12MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, Temp Sensor
• Number Of I /o: 31
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Configuration and Mask Option
5.3 Functional Description
Data Sheet
74
* FLASH register.
† One-time writable register after each reset.
†† Reset by POR only.
$001D
Addr.
$001F
$FF80
Configuration Register 2
Configuration Register 1
Mask Option Register
Register Name
(CONFIG2)
(CONFIG1)
(MOR)*
Figure 5-1. CONFIG and MOR Register Summary
Configuration and Mask Option Registers (CONFIG & MOR) Freescale Semiconductor
†
†
The mask option register selects one of the following oscillator options
as the MCU reference clock:
The configuration registers and the mask option register are used in the
initialization of various options. These two types of registers are
configured differently:
The configuration registers can be written once after each reset. All of
the configuration register bits are cleared during reset. Since the various
options affect the operation of the MCU, it is recommended that these
registers be written immediately after reset. The configuration registers
are located at $001D and $001F. The configurations register may be
read at anytime.
Erased:
Reset:
Reset:
Reset:
Read: STOP_
Write:
Read:
Write:
Read:
Write:
•
•
•
•
•
Internal oscillator
RC oscillator
Crystal oscillator
Configuration registers — Write-once registers after reset
Mask option register — FLASH register (write by programming)
OSCSEL1 OSCSEL0
ICLKEN
COPRS
Bit 7
U
0
0
1
LVISTOP LVIRSTD LVIPWRD LVI5OR3
= Unimplemented
RCLKEN
STOP_
U
6
0
0
1
XCLKEN
STOP_
R
U
5
0
0
1
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
OSCCLK1 OSCCLK0
R
U
4
0
0
1
0
R
U
R
3
0
1
††
= Reserved
SSREC
R
U
2
0
0
0
1
CDOEN
STOP
R
U
1
0
0
1
SCIBDSRC
COPD
Bit 0
R
U
0
0
1