MC908SR12MFAE Freescale Semiconductor, MC908SR12MFAE Datasheet - Page 84

IC MCU 12K FLASH 8MHZ 48-LQFP

MC908SR12MFAE

Manufacturer Part Number
MC908SR12MFAE
Description
IC MCU 12K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908SR12MFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
31
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC908SR12MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908SR12MFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Central Processor Unit (CPU)
6.4.2 Index Register
6.4.3 Stack Pointer
Data Sheet
84
The 16-bit index register allows indexed addressing of a 64K-byte
memory space. H is the upper byte of the index register, and X is the
lower byte. H:X is the concatenated 16-bit index register.
In the indexed addressing modes, the CPU uses the contents of the
index register to determine the conditional address of the operand.
The index register can serve also as a temporary data storage location.
The stack pointer is a 16-bit register that contains the address of the next
location on the stack. During a reset, the stack pointer is preset to
$00FF. The reset stack pointer (RSP) instruction sets the least
significant byte to $FF and does not affect the most significant byte. The
stack pointer decrements as data is pushed onto the stack and
increments as data is pulled from the stack.
In the stack pointer 8-bit offset and 16-bit offset addressing modes, the
stack pointer can function as an index register to access data on the
stack. The CPU uses the contents of the stack pointer to determine the
conditional address of the operand.
Reset:
Read:
Write:
X = Indeterminate
Bit
15
0
14
Central Processor Unit (CPU)
0
13
0
Figure 6-3. Index Register (H:X)
12
0
11
0
10
0
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
9
0
8
0
7
X
6
X
5
X
Freescale Semiconductor
4
X
3
X
2
X
1
X
Bit
0
X

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