MC9S12XEP100CAG Freescale Semiconductor, MC9S12XEP100CAG Datasheet - Page 474

IC MCU 16BIT 1M FLASH 144-LQFP

MC9S12XEP100CAG

Manufacturer Part Number
MC9S12XEP100CAG
Description
IC MCU 16BIT 1M FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
119
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
24-ch x 12-bit
Cpu Family
HCS12X
Device Core Size
16b
Frequency (max)
50MHz
Total Internal Ram Size
64KB
# I/os (max)
119
Number Of Timers - General Purpose
25
Operating Supply Voltage (typ)
1.8/2.8/5V
Operating Supply Voltage (max)
1.98/2.9/5.5V
Operating Supply Voltage (min)
1.72/2.7/3.13V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Package
144LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
11.3
This section provides a detailed description of all registers accessible in the S12XECRG.
11.3.1
Figure 11-2
474
2. FORBYP and CTCTL are intended for factory test purposes only.
Address
0x000A
0x000B
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
FORBYP
Memory Map and Registers
POSTDIV
ARMCOP
CRGFLG
COPCTL
CRGINT
CLKSEL
PLLCTL
CTCTL
RTICTL
REFDV
SYNR
Name
Module Memory Map
gives an overview on all S12XECRG registers.
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
2
2
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
PLLSEL
RTDEC
WCOP
RTIE
CME
Bit 7
RTIF
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
MC9S12XE-Family Reference Manual , Rev. 1.23
= Unimplemented or Reserved
RSBCK
Figure 11-2. CRG Register Summary
PLLON
PORF
PSTP
RTR6
Bit 6
6
0
0
0
0
0
WRTMASK
XCLKS
RTR5
LVRF
FM1
Bit 5
5
0
0
0
0
0
0
NOTE
LOCKIE
LOCKIF
RTR4
FM0
Bit 4
4
0
0
0
0
0
FSTWKP
PLLWAI
LOCK
RTR3
Bit 3
3
0
0
0
0
0
SYNDIV[5:0]
REFDIV[5:0]
POSTDIV[4:0]
RTR2
ILAF
PRE
CR2
Bit 2
2
0
0
0
0
0
Freescale Semiconductor
RTIWAI
SCMIF
SCMIE
RTR1
PCE
CR1
Bit 1
1
0
0
0
COPWAI
SCME
RTR0
SCM
Bit 0
CR0
Bit 0
0
0
0
0

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