ST72F63BE2M1 STMicroelectronics, ST72F63BE2M1 Datasheet - Page 121

• Manufacturer Part Number: ST72F63BE2M1
• Description: MCU 8BIT LS USB 8KB FLASH 24SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F63BE2M1

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 24-SOIC (7.5mm Width)
• Data Converters: A/D 12x10b
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDTU3-EPB/US, ST7MDTULS-EVAL, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
• Minimum Operating Temperature: 0 C
• For Use With: 497-8209 - BOARD EVAL USB STUSB02E/ST72F63B497-8208 - BOARD EVAL USB STUSB03E/ST72F63B497-5521 - EVAL BOARD LOW SPEED USB497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5624-5

ST7263Bxx
I²C Status register 2 (SR2)
Reset value: 0000 0000 (00h)
7
0
[7:5] Reserved. Forced to 0 by hardware.
4 AF Acknowledge failure.
3 STOPF Stop detection (Slave mode).
0
This bit is set by hardware when no acknowledge is returned. An interrupt is
generated if ITE=1. It is cleared by software reading SR2 register or by hardware
when the interface is disabled (PE=0).
0: No acknowledge failure
1: Acknowledge failure
Note: While AF=1, the SCL line may be held low due to SB or BTF flags that are
This bit is set by hardware when a Stop condition is detected on the bus after an
acknowledge (if ACK=1). An interrupt is generated if ITE=1. It is cleared by
software reading SR2 register or by hardware when the interface is disabled
(PE=0).
The SCL line is not held low while STOPF=1.
0: No Stop condition detected
1: Stop condition detected
set at the same time. It is then necessary to release both lines by software.
0
Doc ID 7516 Rev 8
AF
Read only
STOPF
ARLO
On-chip peripherals
BERR
GCAL
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0