ST72F63BE2M1 STMicroelectronics, ST72F63BE2M1 Datasheet - Page 39

MCU 8BIT LS USB 8KB FLASH 24SOIC

ST72F63BE2M1

Manufacturer Part Number
ST72F63BE2M1
Description
MCU 8BIT LS USB 8KB FLASH 24SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F63BE2M1

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
24-SOIC (7.5mm Width)
Data Converters
A/D 12x10b
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST7MDTULS-EVAL, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
For Use With
497-8209 - BOARD EVAL USB STUSB02E/ST72F63B497-8208 - BOARD EVAL USB STUSB03E/ST72F63B497-5521 - EVAL BOARD LOW SPEED USB497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5624-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F63BE2M1
Manufacturer:
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Part Number:
ST72F63BE2M1
Quantity:
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ST7263Bxx
Table 9.
7.1
1
2
3
4
5
Source block
RESET
FLASH
TIMER
TRAP
USB
USB
SCI
I²C
ITi
Interrupt mapping
Interrupt register (ITRFRE)
Address: 0008h
Reset value: 0000 0000 (00h)
IT8E
7
Reset
Software interrupt
Flash Start Programming interrupt
End Suspend mode
External interrupts
Timer Peripheral interrupts
I²C Peripheral interrupts
SCI Peripheral interrupts
USB Peripheral interrupts
[7:0] TiE (i=1 to 8). Interrupt Enable Control Bits.
IT7E
If an ITiE bit is set, the corresponding interrupt is generated when
No interrupt is generated elsewhere.
Note: Analog input must be disabled for interrupts coming from port B.
A rising edge occurs on the pin PA4/IT1 or PA5/IT2 or PB4/IT5 or PB5/IT6
Or a falling edge occurs on the pin PA6/IT3 or PA7/IT4 or PB6/IT7 or PB7/IT8
Description
IT6E
Doc ID 7516 Rev 8
IT5E
Read/write
Register
ITRFRE
I²CSR1
I²CSR2
TIMSR
SCISR
IT4E
label
ISTR
ISTR
N/A
Priority
Highest
Priority
Lowest
Priority
order
IT3E
from
Halt
Exit
yes
yes
yes
no
no
IT2E
FFFCh-FFFDh
FFEEh-FFEFh
FFFEh-FFFFh
FFFAh-FFFBh
FFF8h-FFF9h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
FFF6h-FFF7h
address
Vector
Interrupts
IT1E
0
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