ST72F63BE2M1 STMicroelectronics, ST72F63BE2M1 Datasheet - Page 75

• Manufacturer Part Number: ST72F63BE2M1
• Description: MCU 8BIT LS USB 8KB FLASH 24SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F63BE2M1

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 24-SOIC (7.5mm Width)
• Data Converters: A/D 12x10b
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDTU3-EPB/US, ST7MDTULS-EVAL, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
• Minimum Operating Temperature: 0 C
• For Use With: 497-8209 - BOARD EVAL USB STUSB02E/ST72F63B497-8208 - BOARD EVAL USB STUSB03E/ST72F63B497-5521 - EVAL BOARD LOW SPEED USB497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5624-5

ST7263Bxx
Table 24.
Control/status register (CSR)
Reset value: xxxx x0xx (xxh)
ICF1
7
External Clock (where available)
Clock Control bits
7 ICF1 input Capture Flag 1.
6 OCF1 output Compare Flag 1.
5 TOF Timer Overflow Flag.
4 ICF2 input Capture Flag 2.
OCF1
0: No input capture (reset value).
1: An input capture has occurred on the ICAP1 pin or the counter has reached the
OC2R value in PWM mode. To clear this bit, first read the SR register, then read or
write the low byte of the IC1R (IC1LR) register.
0: No match (reset value).
1: The content of the free running counter has matched the content of the OC1R
register. To clear this bit, first read the SR register, then read or write the low byte of
the OC1R (OC1LR) register.
0: No timer overflow (reset value).
1:The free running counter rolled over from FFFFh to 0000h. To clear this bit, first
read the SR register, then read or write the low byte of the CR (CLR) register.
Note: Reading or writing the ACLR register does not clear TOF.
0: No input capture (reset value).
1: An input capture has occurred on the ICAP2 pin. To clear this bit, first read the
SR register, then read or write the low byte of the IC2R (IC2LR) register.
6
Timer clock
f
f
f
CPU
CPU
CPU
Read only
/ 4
/ 2
/ 8
TOF
Doc ID 7516 Rev 8
5
ICF2
4
OCF2
3
CC1
0
1
TIMD
On-chip peripherals
Read/write
0
CC0
0
1
0
1
75/186
0
0