ST72F63BE2M1 STMicroelectronics, ST72F63BE2M1 Datasheet - Page 164

MCU 8BIT LS USB 8KB FLASH 24SOIC

ST72F63BE2M1

Manufacturer Part Number
ST72F63BE2M1
Description
MCU 8BIT LS USB 8KB FLASH 24SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F63BE2M1

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
24-SOIC (7.5mm Width)
Data Converters
A/D 12x10b
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST7MDTULS-EVAL, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
For Use With
497-8209 - BOARD EVAL USB STUSB02E/ST72F63B497-8208 - BOARD EVAL USB STUSB03E/ST72F63B497-5521 - EVAL BOARD LOW SPEED USB497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-5624-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F63BE2M1
Manufacturer:
ST
0
Company:
Part Number:
ST72F63BE2M1
Quantity:
32
Electrical characteristics
164/186
Figure 78. ADC accuracy characteristics
1. (1) Example of an actual transfer curve; (2) The ideal transfer curve; (3) End point correlation line.
2. E
E
E
E
E
line.
T
O
G
D
L
=Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves.
=Integral Linearity Error: maximum deviation between any actual transition and the end point correlation
=Differential Linearity Error: maximum deviation between actual steps and the ideal one.
=Offset Error: deviation between the first actual transition and the first ideal one.
=Gain Error: deviation between the last ideal transition and the last actual one.
255
254
253
7
6
5
4
3
2
1
0
V
SSA
Digital Result ADCDR
1
1LSB
E
O
2
IDEAL
3
=
4
V
---------------------------------------- -
DDA
Doc ID 7516 Rev 8
5
256
1 LSB
V
E
SSA
6
T
IDEAL
E
7
L
(2)
E
D
253 254 255 256
(3)
(1)
E
G
V
DDA
V
in
(LSB
IDEAL
)
ST7263Bxx

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