MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 421

• Manufacturer Part Number: MC908LJ24CPBE
• Description: IC MCU 24K FLASH 8MHZ SPI 64LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ24CPBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Controller Family/series: HC08
• No. Of I/o's: 40
• Ram Memory Size: 768Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.1 Contents
22.2 Introduction
22.3 Features
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Data Sheet — MC68HC908LJ24
22.2
22.3
22.4
22.4.1
22.4.2
22.4.3
22.4.4
22.5
22.6
22.6.1
22.6.2
This section describes the low-voltage inhibit (LVI) module, which
monitors the voltage on the V
voltage falls below the LVI trip falling voltage, V
Features of the LVI module include:
•
•
•
Programmable LVI interrupt and reset
Selectable LVI trip voltage
Programmable stop mode operation
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
LVI Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .422
Polled LVI Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424
Forced Reset Operation . . . . . . . . . . . . . . . . . . . . . . . . . . .424
Voltage Hysteresis Protection . . . . . . . . . . . . . . . . . . . . . . 424
LVI Trip Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .426
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .426
Section 22. Low-Voltage Inhibit (LVI)
Low-Voltage Inhibit (LVI)
DD
pin and can force a reset when the V
TRIPF
.
Data Sheet
DD
421