ATMEGA169PV-8AUR Atmel, ATMEGA169PV-8AUR Datasheet - Page 20

• Manufacturer Part Number: ATMEGA169PV-8AUR
• Description: MCU AVR 16KB FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169PV-8AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Package: 64TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 54
• Interface Type: SPI/USART/USI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7. AVR Memories
7.1
8018P–AVR–08/10
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega169P. The AVR architecture has
two main memory spaces, the Data Memory and the Program Memory space. In addition, the
ATmega169P features an EEPROM Memory for data storage. All three memory spaces are lin-
ear and regular.
The ATmega169P contains 16 Kbytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 8K
× 16. For software security, the Flash Program memory space is divided into two sections, Boot
Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega169P
Program Counter (PC) is 13 bits wide, thus addressing the 8K program memory locations. The
operation of Boot Program section and associated Boot Lock bits for software protection are
described in detail in
280.
downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7-1.
”Memory Programming” on page 296
14.
Program Memory Map
”Boot Loader Support – Read-While-Write Self-Programming” on page
Application Flash Section
Boot Flash Section
Program Memory
contains a detailed description on Flash data serial
0x0000
0x1FFF
”Instruction Execution Tim-
ATmega169P
20