ATMEGA169PV-8AUR Atmel, ATMEGA169PV-8AUR Datasheet - Page 31

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ATMEGA169PV-8AUR

Manufacturer Part Number
ATMEGA169PV-8AUR
Description
MCU AVR 16KB FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA169PV-8AUR

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
54
Interface Type
SPI/USART/USI
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA169PV-8AUR
Manufacturer:
Atmel
Quantity:
10 000
8.1.4
8.1.5
8.2
8018P–AVR–08/10
Clock Sources
Asynchronous Timer Clock – clk
ADC Clock – clk
The Asynchronous Timer clock allows the Asynchronous Timer/Counter and the LCD controller
to be clocked directly from an external clock or an external 32 kHz clock crystal. The dedicated
clock domain allows using this Timer/Counter as a real-time counter even when the device is in
sleep mode. It also allows the LCD controller output to continue while the rest of the device is in
sleep mode.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion
results.
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the AVR clock generator, and routed to the
appropriate modules.
Table 8-1.
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts
from reset, there is an additional delay allowing the power to reach a stable level before com-
mencing normal operation. The Watchdog Oscillator is used for timing this real-time part of the
start-up time. The number of WDT Oscillator cycles used for each time-out is shown in
2. The frequency of the Watchdog Oscillator is voltage dependent as shown in
teristics” on page
Table 8-2.
ADC
Device Clocking Option
External Crystal/Ceramic Resonator
External Low-frequency Crystal
Calibrated Internal RC Oscillator
External Clock
Reserved
Typ Time-out (V
1. For all fuses “1” means unprogrammed while “0” means programmed.
4.1 ms
65 ms
Device Clocking Options Select
Number of Watchdog Oscillator Cycles
338.
ASY
CC
= 5.0V)
Typ Time-out (V
(1)
4.3 ms
69 ms
CC
= 3.0V)
ATmega169P
0011, 0001, 0101, 0100
Number of Cycles
64K (65,536)
4K (4,096)
1111 - 1000
0111 - 0110
CKSEL3:0
”Typical Charac-
0010
0000
Table 8-
31

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