ATMEGA169PV-8AUR Atmel, ATMEGA169PV-8AUR Datasheet - Page 250
ATMEGA169PV-8AUR
Manufacturer Part Number
ATMEGA169PV-8AUR
Description
MCU AVR 16KB FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA169PV-8AU.pdf
(395 pages)
Specifications of ATMEGA169PV-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
54
Interface Type
SPI/USART/USI
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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23.5.4
8018P–AVR–08/10
LCDCCR – LCD Contrast Control Register
• Bits 7:5 – LCDDC2:0: LDC Display Configuration
The LCDDC2:0 bits determine the amount of time the LCD drivers are turned on for each volt-
age transition on segment and common pins. A short drive time will lead to lower power
consumption, but displays with high internal resistance may need longer drive time to achieve
satisfactory contrast. Note that the drive time will never be longer than one half prescaled LCD
clock period, even if the selected drive time is longer. When using static bias or blanking, drive
time will always be one half prescaled LCD clock period.
Table 23-7.
• Bit 4 – LCDMDT: LCD Maximum Drive Time
Writing this bit to one turns the LCD drivers on 100% on the time, regardless of the drive time
configured by LCDDC2:0.
• Bits 3:0 – LCDCC3:0: LCD Contrast Control
The LCDCC3:0 bits determine the maximum voltage V
different selections are shown in
ning of a new frame.
Bit
(0xE7)
Read/Write
Initial Value
LCDDC2
0
0
0
0
1
1
1
1
LCDDC2
R/W
LCD Display Configuration
7
0
LCDDC1
R/W
6
0
LCDDC1
0
0
1
1
0
0
1
1
LCDDC0
R/W
Table 23-8 on page
5
0
LCDMDT
R/W
4
0
LCDDC0
LCDCC3
0
1
0
1
0
1
0
1
R/W
3
0
251. New values take effect every begin-
LCD
on segment and common pins. The
LCDCC2
R/W
2
0
Nominal drive time
300 µs
70 µs
150 µs
450 µs
575 µs
850 µs
1150 µs
50% of clk
LCDCC1
ATmega169P
R/W
1
0
LCD_PS
LCDCC0
R/W
0
0
LCDCCR
250
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