DSPIC30F4013-20E/PT Microchip Technology, DSPIC30F4013-20E/PT Datasheet - Page 108

• Manufacturer Part Number: DSPIC30F4013-20E/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 13-chx12-bit
• Number Of Timers: 5
• Core Frequency: 20MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401320EPT

dsPIC30F3014/4013
FIGURE 17-1:
DS70138E-page 106
Message
BUFFERS
PROTOCOL
ENGINE
Control
Queue
Note
TXB0
(2)
1:
2:
i = 1 or 2 refers to a particular CAN module (CAN1 or CAN2).
These are conceptual groups of registers, not SFR names by themselves.
CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM
Transmit
CiTX
Logic
Transmit Byte Sequencer
TXB1
(1)
(2)
CRC Generator
Transmit Shift
TXB2
(2)
A
c
c
e
p
t
R
X
B
0
(2)
Receive Shift
CRC Check
Acceptance Mask
Acceptance Filter
Acceptance Filter
Data Field
RXM0
Identifier
RXF0
RXF1
(2)
(2)
(2)
Timing
CiRX
Logic
Bit
(1)
© 2007 Microchip Technology Inc.
M
A
B
Transmit
Receive
Counter
Counter
Identifier
Acceptance Mask
Machine
Acceptance Filter
Acceptance Filter
Acceptance Filter
Acceptance Filter
Protocol
Data Field
Error
Error
Finite
State
RXM1
RXF2
RXF3
RXF4
RXF5
Bit Timing
Generator
(2)
(2)
(2)
(2)
(2)
TERRCNT
Bus Off
RERRCNT
Err Pas
R
X
B
1
(2)
A
c
c
e
p
t