DSPIC30F4013-20E/PT Microchip Technology, DSPIC30F4013-20E/PT Datasheet - Page 214

• Manufacturer Part Number: DSPIC30F4013-20E/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 13-chx12-bit
• Number Of Timers: 5
• Core Frequency: 20MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401320EPT

dsPIC30F3014/4013
Oscillator Selection ........................................................... 135
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 83
Output Compare Module..................................................... 81
Output Compare Operation During CPU Idle Mode............ 83
Output Compare Sleep Mode Operation............................. 83
P
Packaging Information ...................................................... 203
Peripheral Module Disable (PMD) Registers .................... 151
PICSTART Plus Development Programmer ..................... 164
Pinout Descriptions ............................................................. 11
POR. See Power-on Reset.
Port Register Map for dsPIC30F3014/4013 ........................ 53
Port Write/Read Example.................................................... 52
Power Saving Modes
Power-Down Current (I
Power-Saving Modes ........................................................ 149
Power-up Timer
Program Address Space ..................................................... 23
Program and EEPROM Characteristics ............................ 173
Program Counter................................................................. 14
Programmable................................................................... 135
Programmer’s Model........................................................... 14
Programming Operations .................................................... 43
Protection Against Accidental Writes to OSCCON ........... 140
DS70138E-page 212
Control Registers ...................................................... 141
Operating Modes (Table) .......................................... 136
System Overview ...................................................... 135
Timing Characteristics .............................................. 179
Timing Requirements ................................................ 180
Register Map dsPIC30F3014...................................... 84
Register Map dsPIC30F4013...................................... 84
Timing Characteristics .............................................. 183
Timing Requirements ................................................ 183
Marking ..................................................................... 203
Sleep and Idle ........................................................... 135
Idle ............................................................................ 150
Sleep ......................................................................... 149
Timing Characteristics .............................................. 179
Timing Requirements ................................................ 180
Construction ................................................................ 24
Data Access from Program Memory Using
Data Access From Program Memory Using
Data Access from, Address Generation...................... 24
Data Space Window into Operation ............................ 27
Data Table Access (lsw) ............................................. 25
Data Table Access (MS Byte) ..................................... 26
Memory Map ............................................................... 23
Table Instructions
Diagram ...................................................................... 15
Algorithm for Program Flash ....................................... 43
Erasing a Row of Program Memory ............................ 43
Initiating the Programming Sequence ......................... 44
Loading Write Latches ................................................ 44
Program Space Visibility ..................................... 26
Table Instructions................................................ 25
TBLRDH.............................................................. 25
TBLRDL .............................................................. 25
TBLWTH ............................................................. 25
TBLWTL.............................................................. 25
PD
) ................................................ 169
R
Reader Response............................................................. 216
Reset ........................................................................ 135, 145
Reset Sequence ................................................................. 57
Reset Sources
Reset Timing Characteristics............................................ 179
Reset Timing Requirements ............................................. 180
Run-Time Self-Programming (RTSP) ................................. 41
S
Simple Capture Event Mode............................................... 77
Simple OC/PWM Mode Timing Requirements ................. 184
Simple Output Compare Match Mode ................................ 82
Simple PWM Mode ............................................................. 82
Software Simulator (MPLAB SIM) .................................... 162
Software Stack Pointer, Frame Pointer .............................. 14
SPI Module ......................................................................... 93
Status Bits, Their Significance and the Initialization
Status Bits, Their Significance and the Initialization
Status Register ................................................................... 14
Symbols Used in Opcode Descriptions ............................ 154
System Integration............................................................ 135
BOR, Programmable ................................................ 147
Brown-out Reset (BOR)............................................ 135
Oscillator Start-up Timer (OST) ................................ 135
POR
POR (Power-on Reset)............................................. 145
Power-on Reset (POR)............................................. 135
Power-up Timer (PWRT) .......................................... 135
Reset Sources ............................................................ 57
Brown-out Reset (BOR).............................................. 57
Illegal Instruction Trap ................................................ 57
Trap Lockout............................................................... 57
Uninitialized W Register Trap ..................................... 57
Watchdog Time-out .................................................... 57
Buffer Operation ......................................................... 78
Hall Sensor Mode ....................................................... 78
Prescaler .................................................................... 77
Timer2 and Timer3 Selection Mode............................ 78
Input Pin Fault Protection ........................................... 82
Period ......................................................................... 83
CALL Stack Frame ..................................................... 32
Framed SPI Support ................................................... 93
Operating Function Description .................................. 93
Operation During CPU Idle Mode ............................... 95
Operation During CPU Sleep Mode............................ 95
SDOx Disable ............................................................. 93
Slave Select Synchronization ..................................... 95
SPI1 Register Map...................................................... 96
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 93
Condition for RCON Register, Case 1 ...................... 148
Condition for RCON Register, Case 2 ...................... 148
Register Map ............................................................ 152
Operating without FSCM and PWRT................ 147
With Long Crystal Start-up Time ...................... 147
Master Mode (CKE = 0).................................... 189
Master Mode (CKE = 1).................................... 190
Slave Mode (CKE = 1).............................. 191, 192
Master Mode (CKE = 0).................................... 189
Master Mode (CKE = 1).................................... 190
Slave Mode (CKE = 0)...................................... 191
Slave Mode (CKE = 1)...................................... 193
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