AT89C5131A-PUTUM Atmel, AT89C5131A-PUTUM Datasheet - Page 40

• Manufacturer Part Number: AT89C5131A-PUTUM
• Description: IC 8051 MCU FLASH 32K USB 32QFN
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131A-PUTUM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Core: 8051
• Processor Series: AT89x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Data Ram Size: 1.25 KB
• Number Of Programmable I/os: 34
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 5.5 V
• Mounting Style: SMD/SMT
• Height: 0.95 mm
• Interface Type: 2-Wire, EUART, SPI, USB
• Length: 7 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

9.4.1.3
9.4.2
40
AT89C5130A/31A-M
Software Registers
Default Values
Table 9-2.
Notes:
These security bits protect the code access through the parallel programming interface. They
are set by default to level 4. The code access through the ISP is still possible and is controlled
by the “software security bits” which are stored in the extra Flash memory accessed by the ISP
firmware.
To load a new application with the parallel programmer, a chip erase must be done first. This will
set the HSB in its inactive state and will erase the Flash memory. The part reference can always
be read using Flash parallel programming modes.
The default value of the HSB provides parts ready to be programmed with ISP:
Several registers are used, in factory and by parallel programmers, to make copies of hardware
registers contents. These values are used by Atmel ISP (see Section “In-System Programming
(ISP)”).
These registers are in the “Extra Flash Memory” part of the Flash memory. This block is also
called ”XAF” or eXtra Array Flash. They are accessed in the following ways:
Several software registers are described in Table 9-3.
• BLJB: Cleared to force ISP operation.
• X2: Set to force X1 mode (Standard Mode)
• OSCON1-0: Set to start with 32 MHz oscillator configuration value.
• LB2-0: Security level four to protect the code from a parallel access with maximum security.
• Commands issued by the parallel memory programmer.
• Commands issued by the ISP software.
• Calls of API issued by the application software.
1. U: unprogrammed or “one” level.
2. P: programmed or “zero” level.
3. X: don’t care
4. WARNING: Security level 2 and 3 should only be programmed after verification.
Security level
Program Lock bits
1
2
3
4
Program Lock Bits
LB0
U
P
X
X
LB1
U
U
P
X
LB2
U
U
U
P
Protection Description
No program lock features enabled.
MOVC instruction executed from external
program memory is disabled from fetching code
bytes from any internal memory, EA is sampled
and latched on reset, and further parallel
programming of the Flash and of the EEPROM
(boot and Xdata) is disabled. ISP and software
programming with API are still allowed.
Same as 2, also verify through parallel
programming interface is disabled and serial
programming ISP is still allowed.
Same as 3, also external execution is disabled.
4337K–USB–04/08