AT91SAM7X128B-AU Atmel, AT91SAM7X128B-AU Datasheet - Page 503
AT91SAM7X128B-AU
Manufacturer Part Number
AT91SAM7X128B-AU
Description
IC MCU 128KB FLASH 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7X128B-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
JTAG, SPI, UART
Maximum Clock Frequency
55 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AT91SAM7xxxxx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
55MHz
No. Of Timers
1
Rohs Compliant
Yes
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7X128B-AU
Manufacturer:
Atmel
Quantity:
1 929
Part Number:
AT91SAM7X128B-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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36. Controller Area Network (CAN)
36.1
6120I–ATARM–06-Apr-11
Overview
The CAN controller provides all the features required to implement the serial communication
protocol CAN defined by Robert Bosch GmbH, the CAN specification as referred to by
ISO/11898A (2.0 Part A and 2.0 Part B) for high speeds and ISO/11519-2 for low speeds. The
CAN Controller is able to handle all types of frames (Data, Remote, Error and Overload) and
achieves a bitrate of 1 Mbit/sec.
CAN controller accesses are made through configuration registers. 8 independent message
objects (mailboxes) are implemented.
Any mailbox can be programmed as a reception buffer block (even non-consecutive buffers).
For the reception of defined messages, one or several message objects can be masked without
participating in the buffer feature. An interrupt is generated when the buffer is full. According to
the mailbox configuration, the first message received can be locked in the CAN controller regis-
ters until the application acknowledges it, or this message can be discarded by new received
messages.
Any mailbox can be programmed for transmission. Several transmission mailboxes can be
enabled in the same time. A priority can be defined for each mailbox independently.
An internal 16-bit timer is used to stamp each received and sent message. This timer starts
counting as soon as the CAN controller is enabled. This counter can be reset by the application
or automatically after a reception in the last mailbox in Time Triggered Mode.
The CAN controller offers optimized features to support the Time Triggered Communication
(TTC) protocol.
SAM7X512/256/128 Preliminary
503
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