AT91SAM7X128B-AU Atmel, AT91SAM7X128B-AU Datasheet - Page 554

• Manufacturer Part Number: AT91SAM7X128B-AU
• Description: IC MCU 128KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X128B-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: JTAG, SPI, UART
• Maximum Clock Frequency: 55 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AT91SAM7xxxxx
• No. Of I/o's: 62
• Ram Memory Size: 32KB
• Cpu Speed: 55MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Cpu Family: 91S
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 55MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 62
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

• MRTR: Mailbox Remote Transmission Request
• MABT: Mailbox Message Abort
An interrupt is triggered when MABT is set.
0 = Previous transfer is not aborted.
1 = Previous transfer has been aborted.
This flag is cleared by writing to CAN_MCRx register
• MRDY: Mailbox Ready
An interrupt is triggered when MRDY is set.
0 = Mailbox data registers can not be read/written by the software application. CAN_MDx are locked by the CAN_MDx.
1 = Mailbox data registers can be read/written by the software application.
This flag is cleared by writing to CAN_MCRx register.
554
Mailbox Object Type
Receive
Receive with overwrite
Transmit
Consumer
Producer
Mailbox Object Type
Receive
Receive with overwrite
Transmit
Consumer
Producer
Mailbox Object Type
Receive
Receive with overwrite
Transmit
Consumer
Producer
SAM7X512/256/128 Preliminary
Description
The first frame received has the RTR bit set.
The last frame received has the RTR bit set.
Reserved
Reserved. After setting the MOT field in the CAN_MMR, MRTR is reset to 1.
Reserved. After setting the MOT field in the CAN_MMR, MRTR is reset to 0.
Description
Reserved
Reserved
Previous transfer has been aborted
The remote frame transfer request has been aborted.
The response to the remote frame transfer has been aborted.
Description
At least one message has been received since the last mailbox transfer order. Data from the first frame
received can be read in the CAN_MDxx registers.
After setting the MOT field in the CAN_MMR, MRDY is reset to 0.
At least one frame has been received since the last mailbox transfer order. Data from the last frame received
can be read in the CAN_MDxx registers.
After setting the MOT field in the CAN_MMR, MRDY is reset to 0.
Mailbox data have been transmitted.
After setting the MOT field in the CAN_MMR, MRDY is reset to 1.
At least one message has been received since the last mailbox transfer order. Data from the first message
received can be read in the CAN_MDxx registers.
After setting the MOT field in the CAN_MMR, MRDY is reset to 0.
A remote frame has been received, mailbox data have been transmitted.
After setting the MOT field in the CAN_MMR, MRDY is reset to 1.
6120I–ATARM–06-Apr-11