AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 292

MCU CAP7 FPGA 225LFBGA

AT91CAP7E-NA-ZJ

Manufacturer Part Number
AT91CAP7E-NA-ZJ
Description
MCU CAP7 FPGA 225LFBGA
Manufacturer
Atmel
Series
CAP™r
Datasheets

Specifications of AT91CAP7E-NA-ZJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
80MHz
Connectivity
EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
ROM
Ram Size
160K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
225-LFBGA
Processor Series
AT91Mx
Core
ARM7TDMI
Data Bus Width
32 bit
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91CAP7E-NA-ZJ
Manufacturer:
Atmel
Quantity:
10 000
27.4
Figure 27-3. I/O Line Control Logic
292
Output Enable
Output Enable
Peripheral A
Peripheral B
Functional Description
PIO_BSR[0]
Peripheral A
Peripheral B
PIO_ASR[0]
AT91CAP7E
Output
Output
PIO_ABSR[0]
PIO_OER[0]
PIO_ODR[0]
The PIO Controller features up to 32 fully-programmable I/O lines. Most of the control logic asso-
ciated to each I/O is represented in
represents but one of up to 32 possible indexes.
1
1
0
0
PIO_OSR[0]
PIO_IFER[0]
PIO_IFDR[0]
PIO_SODR[0]
PIO_CODR[0]
PIO_IFSR[0]
PIO_PDR[0]
PIO_PER[0]
Glitch
Filter
PIO_ODSR[0]
PIO_PSR[0]
PIO_PDSR[0]
1
0
PIO_IER[31]
PIO_IDR[31]
PIO_IDR[0]
PIO_IER[0]
1
0
1
Detector
0
Edge
PIO_IMR[31]
PIO_ISR[31]
PIO_IMR[0]
PIO_ISR[0]
PIO_MDDR[0]
PIO_MDER[0]
Figure
PIO_MDSR[0]
27-3. In this description each signal shown
(Up to 32 possible inputs)
1
0
0
1
PIO_PUDR[0]
PIO_PUER[0]
PIO_PUSR[0]
PIO Interrupt
Peripheral B
Peripheral A
Input
Input
8549A–CAP–10/08
Pad

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