LH75411N0Q100C0;55 NXP Semiconductors, LH75411N0Q100C0;55 Datasheet - Page 10

• Manufacturer Part Number: LH75411N0Q100C0;55
• Description: IC ARM7 BLUESTREAK MCU 144LQFP
• Manufacturer: NXP Semiconductors
• Series: BlueStreak ; LH7r

Specifications of LH75411N0Q100C0;55

• Package / Case: 144-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 84MHz
• Connectivity: EBI/EMI, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LH75
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: JTAG, SPI, UART
• Maximum Clock Frequency: 84 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4330; 935285046557

LH75401/LH75411
LH75401 Signal Descriptions
10
PIN NO. SIGNAL NAME
10
12
13
15
16
18
19
20
21
22
23
24
25
27
28
29
30
31
32
33
35
36
37
38
39
40
43
44
45
46
47
49
50
51
52
53
55
56
57
58
60
61
72
73
1
2
4
5
6
7
9
D[15:0]
nWE
nOE
nWAIT
nBLE1
nBLE0
nCS3
nCS2
nCS1
nCS0
A[23:0]
DREQ
DACK
Input/Output Data Input/Output Signals
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
TYPE
Input
Input
Table 3. LH75401 Signal Descriptions
Static Memory Controller Write Enable
Static Memory Controller Output Enable
Static Memory Controller External Wait Control
Static Memory Controller Byte Lane Strobe
Static Memory Controller Byte Lane Strobe
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Address Signals
DMA Request
DMA Acknowledge
DMA CONTROLLER (DMAC)
NXP Semiconductors
MEMORY INTERFACE (MI)
Rev. 01 — 16 July 2007
DESCRIPTION
Preliminary data sheet
System-on-Chip
NOTES
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1
2
2
1
1
1
2