LH75411N0Q100C0;55 NXP Semiconductors, LH75411N0Q100C0;55 Datasheet - Page 49

• Manufacturer Part Number: LH75411N0Q100C0;55
• Description: IC ARM7 BLUESTREAK MCU 144LQFP
• Manufacturer: NXP Semiconductors
• Series: BlueStreak ; LH7r

Specifications of LH75411N0Q100C0;55

• Package / Case: 144-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 84MHz
• Connectivity: EBI/EMI, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LH75
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: JTAG, SPI, UART
• Maximum Clock Frequency: 84 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4330; 935285046557

System-on-Chip
Color LCD Controller Timing Waveforms
grams for the CLCDC and the Advanced LCD Interface.
STN HORIZONTAL TIMING
for STN panels. In this figure, the CLCDC Clock (an
input to the CLCDC) is scaled within the CLCDC and
used to produce the LCDDCLK output. Programmable
registers in the CLCDC set the timings (in terms of
LCDDCLK pulses) to produce the other signals that
control an STN display.
For example, Figure 15 shows that the duration of
the LCDLP signal is controlled by Timing0:HSW
(the HSW bit field in the Timing0 Register). Figure
15 also shows that the polarity of the LCDLP sig-
nal is set by Timing2:IHS.
STN VERTICAL TIMING
for STN panels.
Preliminary data sheet
This section describes typical output waveform dia-
Figure 15 shows typical horizontal timing waveforms
Figure 16 shows typical vertical timing waveforms
NXP Semiconductors
Rev. 01 — 16 July 2007
TFT HORIZONTAL TIMING
for TFT panels.
TFT VERTICAL TIMING
for TFT panels.
AD-TFT/HR-TFT HORIZONTAL TIMING WAVE-
FORMS
for AD-TFT and HR-TFT panels. The ALI adjusts the
normal TFT timing to accommodate these panels.
AD-TFT/HR-TFT VERTICAL TIMING WAVEFORMS
for AD-TFT and HR-TFT panels. The power sequenc-
ing and register information is the same as for TFT ver-
tical timing.
Figure 17 shows typical horizontal timing waveforms
Figure 18 shows typical vertical timing waveforms
Figure 19 shows typical horizontal timing waveforms
Figure 20 shows typical vertical timing waveforms
LH75401/LH75411
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