STM32F103R8H7 STMicroelectronics, STM32F103R8H7 Datasheet - Page 12
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STM32F103R8H7
Manufacturer Part Number
STM32F103R8H7
Description
MCU 32BIT 64K FLASH 64BGA
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F103R8H6.pdf
(99 pages)
Specifications of STM32F103R8H7
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LFBGA
Processor Series
STM32F103x
Core
ARM Cortex M3
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ST-LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F103R8H7
Manufacturer:
STMicroelectronics
Quantity:
10 000
Description
12/99
Figure 2.
1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is
2. For the USB function to be available, both HSE and PLL must be enabled, with USBCLK running at 48
3. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz, 28 MHz or 56 MHz.
64 MHz.
MHz.
OSC32_OUT
OSC32_IN
OSC_OUT
OSC_IN
MCO
Clock tree
4-16 MHz
32.768 kHz
HSE OSC
Main
Clock Output
LSE OSC
HSI RC
8 MHz
LSI RC
40 kHz
PLLSRC
MCO
x2, x3, x4
PLLMUL
HSI
..., x16
PLLXTPRE
PLL
/2
/128
Doc ID 13587 Rev 13
LSE
LSI
/2
RTCSEL[1:0]
/2
HSE
PLLCLK
SYSCLK
HSI
PLLCLK
RTCCLK
to Independent Watchdog (IWDG)
HSI
HSE
CSS
SW
SYSCLK
72 MHz
to RTC
max
IWDGCLK
Prescaler
/1, 2..512
AHB
Prescaler
/1, 1.5
FLITFCLK
to Flash programming interface
USB
TIM1 timer
If (APB2 prescaler =1) x1
else
/1, 2, 4, 8, 16
/1, 2, 4, 8, 16
TIM2,3, 4
If (APB1 prescaler =1) x1
else
/8
Prescaler
Prescaler
72 MHz max
APB2
APB1
STM32F103x8, STM32F103xB
Prescaler
/2, 4, 6, 8
Clock
Enable (3 bits)
ADC
48 MHz
Legend:
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
72 MHz max
36 MHz max
ADCCLK
Peripheral Clock
Peripheral Clock
Enable (13 bits)
Enable (11 bits)
x2
USBCLK
to USB interface
x2
HCLK
to AHB bus, core,
memory and DMA
FCLK Cortex
free running clock
to Cortex System timer
Peripheral Clock
Enable (1 bit)
Peripheral Clock
Enable (3 bits)
TIM1CLK
TIMXCLK
PCLK1
PCLK2
to APB1
peripherals
to APB2
peripherals
to TIM2, 3
and 4
to ADC
to TIM1
ai14903